研究者データベース

AMBALATHANKANDY PRASOON(アンバラサンカンデイ プラスーン)
量子集積エレクトロニクス研究センター
博士研究員

基本情報

所属

  • 量子集積エレクトロニクス研究センター

職名

  • 博士研究員

J-Global ID

研究キーワード

  • Real-time image processing, digital system design   

研究分野

  • 情報通信 / 高性能計算

所属学協会

  • アイ・トリプル・イー、   

研究活動情報

論文

  • Masayuki Ikebe, Prasoon Ambalathankandy, Yafei Ou
    ITE Transactions on Media Technology and Applications 10 2 27 - 51 2022年 [招待有り]
  • Prasoon Ambalathankandy, Yafei Ou, Masayuki Ikebe
    Journal of Electronic Imaging 30 04 2021年08月28日 [査読有り]
  • Yafei Ou, Prasoon Ambalathankandy, Shinya Takamaeda, Masato Motomura, Tetsuya Asai, Masayuki Ikebe
    IEEE Transactions on Circuits and Systems for Video Technology 1 - 1 2021年
  • アンバラタンカンディ プラソン
    2019 IEEE Digital Image Computing: Techniques and Applications (DICTA) 2019年12月 [査読有り][通常論文]
     
    In this paper, we analyze and propose the usefulness of smoothed LHE (Local Histogram Equalization) filters for processing images with low contrast like digital radiographic images. Digital X-rays are known to have optical illusions like Mach bands and background contrast effects, which are caused by lateral inhibition phenomena. We observe that using multilayer (ML) methods with latest edge preserving filter for contrast enhancement in medical images can be problematic and could lead to faulty diagnosis from detail exaggeration which are caused by uncontrolled texture boosting from user defined gain settings. ML filters are designed with few subjectively selected filter kernel sizes, which can result in unnaturalness in output images. We propose a smoothed LHE-like filter with an adaptive gain control, that is more robust and can enhance fine details in digital X-rays while maintaining their intrinsic naturalness. Preserving naturalness in X-ray images are an essential feature for radiographic diagnostics. Our proposed filter has 0(1) complexity and can easily be controlled and operated with a continuously varying kernel size, which functions like an active high pass filter, amplifying all frequencies within the kernel.
  • アンバラタンカンディ プラソン
    IEEE Transactions on Circuits and Systems for Video Technology 2019年07月 [査読有り][通常論文]
     
    We present a fast global and locally adaptive tone mapping algorithm and its FPGA implementation. The specially designed tone mapping function, which is based on local histogram equalization, controls global and local characteristics individually. In contrast to other tonemap operators, our algorithm manages light/dark halos separately and by using local tonemap function alone, it is able to effectively suppress noise. We validated our algorithms effectiveness by means of subjective and objective assessment. Using average of the bins, we achieve fast smoothed local histogram estimation with fewer bins while maintaining high accuracy. Our new implementation method, requires minimal data access and reduced memory as it operates with a downscaled frame size of 240 × 135 pixels. Relative local area size is 248 × 248 @Full-HD resolution (1920 × 1080). For low-latency pixel output, the system performs the tone mapping using pixel information from the previous frame. When we implemented the system on FPGA (TB-7K-325TIMG, Xilinx Kintex-7), we achieved lightweight hardware as the total usage rate is about 25% of the available FPGA resource. Using an online 1080p video we demonstrate, a real-time video processing using our hardware tone mapping system.
    https://www.youtube.com/watch?v=oJ22QEuUxDk
  • アンバラタンカンディ プラソン
    2019 IEEE 16th International Symposium on Biomedical Imaging 2019年04月 [査読有り][通常論文]
     
    This paper is an application of image processing techniques for computer-aided diagnosis of Rheumatoid Arthritis (RA). Accurately measuring the progression of joint space narrowing (JSN) is crucial during medical treatment and in imaging biomarkers in clinical trials. In this paper, we analyze sequential radiographic images of patients who have rheumatoid arthritis in hands using image processing techniques. Phase only correlation (POC) is used to detect the progression of JSN between images. A new image processing algorithm is proposed to segment joint images so as to eliminate the mutual interference when measuring the movement of the upper and lower bones by POC. We found that the texture feature on bones will greatly affect the accuracy of POC. Median filter is used to eliminate the effect of texture, and excellent results are obtained in practice. Additionally, the progress of JSN is measured accurately in our method. This can be beneficial for doctors in the identification of disease stages.
  • アンバラタンカンディ プラソン
    2018 IEEE Visual Communications and Image Processing (VCIP) 1 - 4 2019年04月 [査読有り][通常論文]
     
    To replicate human visual perception, we analyze processing images with optical illusion using edge preserving filters and smoothed local histogram equalization (LHE). Images with the optical illusions are good models for gradual/rapid changes in contrast and strong edges, which are good cases for assessing the robustness of image filters. Here, we study and an-alyze the performance of smoothed LHE filters while processing perceptual illusion. Our studies conclude that, smoothed LHEs are useful in retaining actual edge forms in these images as they can operate using large kernel sizes. These large kernel size filters can construct sawtooth like edge and it corresponds to adequately wide halos. We also demonstrate the usefulness of smoothed LHE like tone mapping techniques in preserving naturalness, and we confirmed it by performing subjective visual test.
  • アンバラタンカンディ プラソン
    Japanese Journal of Applied Physics 58 SBBL06 2019年03月 [査読有り][通常論文]
     
    We propose a Si-CMOS terahertz image sensor to resolve paucity of low-cost and small-size detectors. The imaging pixel consists of an on-chip antenna and an amplifier acting as envelope detector. The pixel uses a microstrip patch antenna for receiving THz waves. However, the antenna's narrow bandwidth and large ground plane size causes major problems. A low-resistivity Si substrate degrades the gain of planar antennas besides the microstrip patch antenna. We introduce an on-chip folded-slot antenna to reduce the pixel size and prevent gain degradation due to the Si substrate. The antenna has a broader bandwidth and higher gain than conventional on-chip slot antenna. We fabricated the patch/folded-slot types of the pixel circuits by using 0.18 μm CMOS process. Measurement results show that the folded-slot antenna has a broader bandwidth from 850 GHz to 1.05 THz
  • アンバラタンカンディ プラソン
    2019 IEEE International Solid-State Circuits Conference-(ISSCC) 108 - 110 2019年02月 [査読有り][通常論文]
     
    There are many compelling characteristics of signals in the terahertz band (100GHz to 10THz) located between the millimeter wave band and the infrared band. In particular, terahertz waves have higher spatial resolution than mm-waves. Moreover, they can transmit through various substances such as plastics, fibers and paper, and can detect hazardous substances. Because of these features, interest in terahertz applications such as security screening is rising. However, there is a paucity of low-cost terahertz detectors. The Si-CMOS process technology is low-cost and highly integratable with readout electronics and on-chip signal processors. A key consideration for many of the terahertz-detector technologies is the need for additional process steps to make them compatible with CMOS technologies [1]. Recent antenna-type pixel detectors have shown success in high-speed operation and do not require extra process steps [2]; however, power consumption of each pixel and the sequential read-out architecture offsets the speed advantage.
  • Prasoon Ambalathankandy, Shinya Takamaeda, Motomura Masato, Tetsuya Asai, Masayuki Ikebe, Hotaka Kusano
    Microprocessors and Microsystems 61 21 - 31 2018年09月01日 [査読有り][通常論文]
     
    The demand for light-weight and high-speed super resolution (SR) techniques are growing because of super high-resolution displays, such as 4K/8K ultra high definition televisions (UHDTVs), which have become common. We propose a single pass over up-sampled anti-aliasing based SR method. Our method can attenuate jaggies and perform natural-looking contrast improvement focusing only on the shadow part in the edge of an enlarged image without the need to preserve the entire enlarged image. Therefore, this method is suitable for hardware implementation, and the proposed architecture requires five-line buffers only (in the memory section). We implemented the proposed method on a field programmable gate array (FPGA) and demonstrated HDTV-to-4K and-8K SR processing in real time (60 frames per second).
  • アンバラタンカンディ プラソン
    2018 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP) 1842 - 1846 2018年04月 [査読有り][通常論文]
     
    In this study, we propose an efficient stereo matching method which estimates sparse disparities using global phase only correlation (POC). Conventionally, cost functions are to be calculated for all disparity candidates and the associated computational cost has been impediment in achieving a realtime performance. Therefore, we consider to use full image 2D phase only correlation (FIPOC) for detecting the valid disparities candidates. This would require comparatively fewer calculations for the same number of disparities. Since, the FIPOC output indicates the disparity distribution of two stereo images, we can sort the disparity candidates and choose them for sparse calculation. In our proposed method, the searchable disparity range is half of the input image size, which is much wider than that of the conventional methods. When we apply the FIPOC to naive sum of absolute difference (SAD) stereo matching method, the combined algorithm would require fewer calculations while maintaining the same accuracy. In our evaluation, the proposed method achieves 194 disparity stereo matching in 70 ms on 398×288 images without the need for SIMD instruction, multi-thread operation, or additional hardware while using a Intel Core i5-5257U.
  • アンバラタンカンディ プラソン
    Journal of Real-Time Image Processing 1 - 17 2016年 [査読有り][通常論文]
     
    In this paper, we present a real-time hardware implementation of an exponent-based tone mapping algorithm of Horé et al., that uses both local and global image information for improving the contrast and increasing the brightness of tone-mapped images. Although there are several tone mapping algorithms available in the literature, most of them require manual tuning of their rendering parameters. However, in our implementation, the algorithm has an embedded automatic key parameter estimation block that controls the brightness of the tone-mapped images. We also present the implementation of a Gaussian-based halo-reducing filter. The hardware implementation is described in Verilog and synthesized for a field programmable gate array device. Experimental results performed on different wide dynamic range images show that we are able to get images which are of good visual quality and have good brightness and contrast. The good performance of our hardware architecture is also confirmed quantitatively with the high peak signal-to-noise ratio and structural similarity index.
  • アンバラタンカンディ プラソン
    2016年 [査読有り][通常論文]
     
    In this thesis, we present a real-time hardware implementation of an exponent-based tone mapping algorithm of Horé et al. Although there are several tone mapping algorithms available in the literature, most of them require manual tuning of their rendering parameters. However, in our implementation, the algorithm has an embedded automatic key parameter estimation block that controls the brightness of the tone-mapped images. We also present the implementation of a Gaussian-based halo reducing filter. The hardware implementation is described in Verilog and synthesized for a field-programmable gate array (FPGA) device. Experimental results performed on different wide dynamic range (WDR) images show that we are able to get images which are of good visual quality and have good brightness and contrast. The good performance of our hardware architecture is also confirmed quantitatively with the high peak signal-to-noise ratio (PSNR) and structural similarity (SSIM) index.
  • SCIENTIFIC PROGRESS OF THE MC-PAD NETWORK
    アンバラタンカンディ プラソン
    PH-EP-Tech-Note-2013-004 2013年01月 [査読有り][通常論文]
     
    MC-PAD is a multi-site Initial Training Network on particle detectors in physics experiments. It comprises nine academic participants, three industrial partners and two associated academic partners. 17 recruited Early Stage and 5 Experienced Researchers have performed their scientific work in the network. The research and development work of MC-PAD is organized in 12 work packages, which focus on a large variety of aspects of particle detector development, electronics as well as simulation and modelling. The network was established in November 2008 and lasted until October 2012 (48 months). This report describes the RD activities and highlights the main results achieved during this period.
  • Infrastructure for Detector Research and Development towards the International Collider
    アンバラタンカンディ プラソン
    arXiv: 1201.4657 2012年01月 [査読有り][通常論文]
     
    The EUDET-project was launched to create an infrastructure for developing and testing new and advanced detector technologies to be used at a future linear collider. The aim was to make possible experimentation and analysis of data for institutes, which otherwise could not be realized due to lack of resources. The infrastructure comprised an analysis and software network, and instrumentation infrastructures for tracking detectors as well as for calorimetry.
  • Infrastructure for detector research and development towards the International Linear Collider
    アンバラタンカンディ プラソン
    arXiv preprint arXiv:1201.4657 2012年01月 [査読有り][通常論文]
     
    The EUDET-project was launched to create an infrastructure for developing and testing new and advanced detector technologies to be used at a future linear collider. The aim was to make possible experimentation and analysis of data for institutes, which otherwise could not be realized due to lack of resources. The infrastructure comprised an analysis and software network, and instrumentation infrastructures for tracking detectors as well as for calorimetry.
  • A slow control interface for ADC ASIC
    アンバラタンカンディ プラソン
    Proceedings of the 18th FCAL Collaboration Workshop 2011年05月 [査読有り][通常論文]
  • M. Idzik, K. Swientek, T. Fiutowski, S. Kulis, P. Ambalathankandy
    JOURNAL OF INSTRUMENTATION 6 01 P01004  2011年01月 [査読有り][通常論文]
     
    The design and measurement results of a power scalable 10-bit pipeline ADC developed for the luminosity detector at the future International Linear Collider (ILC) are discussed. The prototype is designed and fabricated in 0.35 mu m CMOS technology. A wide spectrum of measurements of static (INL<1 LSB, DNL<0.5 LSB) and dynamic (SNHR>58 dB, SINAD similar to 58 dB) parameters are performed to understand and quantify the circuit performance. The ADC works for sampling rates from 1 kS/s to 25 MS/s covering more than four orders of magnitude. In most of the range power consumption scales linearly with sampling rate with a factor of 0.85 mW/MS/s. With ILC beam structure and sampling rate of about 3.5 MS/s, using the implemented in ASIC power switching off feature, an average power consumption of about 15 mu W per channel may be obtained. The ADC layout is drawn with a constant pitch of 300 mu m to facilitate a multichannel implementation.
  • H. Abramowicz, A. Abusleme, K. Afanaciev, J. Aguilar, P. Ambalathankandy, P. Bambade, M. Bergholz, I. Bozovic-Jelisavcic, E. Castro, G. Chelkov, C. Coca, W. Daniluk, A. Dragone, L. Dumitru, K. Elsener, I. Emeliantchik, T. Fiutowski, M. Gostkin, C. Grah, G. Grzelak, G. Haller, H. Henschel, A. Ignatenko, M. Idzik, K. Ito, T. Jovin, E. Kielar, J. Kotula, Z. Krumstein, S. Kulis, W. Lange, W. Lohmann, A. Levy, A. Moszczynski, U. Nauenberg, O. Novgorodova, M. Ohlerich, M. Orlande, G. Oleinik, K. Oliwa, A. Olshevski, M. Pandurovic, B. Pawlik, D. Przyborowski, Y. Sato, I. Sadeh, A. Sailer, R. Schmidt, B. Schumm, S. Schuwalow, I. Smiljanic, K. Swientek, Y. Takubo, E. Teodorescu, W. Wierba, H. Yamamoto, L. Zawiejski, J. Zhang
    JOURNAL OF INSTRUMENTATION 5 12 P12002  2010年12月 [査読有り][通常論文]
     
    Two special calorimeters are foreseen for the instrumentation of the very forward region of the ILC detector, a luminometer designed to measure the rate of low angle Bhabha scattering events with a precision better than 10(-3) and a low polar angle calorimeter, adjacent to the beam-pipe. The latter will be hit by a large amount of beamstrahlung remnants. The amount and shape of these depositions will allow a fast luminosity estimate and the determination of beam parameters. The sensors of this calorimeter must be radiation hard. Both devices will improve the hermeticity of the detector in the search for new particles. Finely segmented and very compact calorimeters will match the requirements. Due to the high occupancy fast front-end electronics is needed. The design of the calorimeters developed and optimised with Monte Carlo simulations is presented. Sensors and readout electronics ASICs have been designed and prototypes are available. Results on the performance of these major components are summarised.
  • アンバラタンカンディ プラソン
    Proceeding ICAC3 '09 Proceedings of the International Conference on Advances in Computing, Communication and Control 573 - 577 2009年01月 [査読有り][通常論文]
     
    With continuous advancement of VLSI technology it has become possible to achieve any desired performance metric, but at a cost of increased system complexity. In this paper we present area optimal integer 2-D DCT architecture for H. 264/AVC codecs. The 2-D DCT calculation is performed by utilizing the separability property, in such a way, 2-D DCT is divided into two 1-D DCT calculation that share a common memory, which considerably reduces the gate count. Due to its area optimized approach the design will find application in hand-held/mobile devices. The transform module has been coded in Verilog hardware description language (HDL) and synthesized in 0.18μ TSMC technology.

その他活動・業績

受賞

  • 2020年09月 北海道大学 大学院情報科学院 学部長賞
  • 2019年 Japan Society for the Promotion of Science (JSPS) Research Fellowships for Young Scientists.
     JSPS fellow- DC2 
    受賞者: アンバラタンカンディ プラソン
  • 2018年05月 公益社団法人 北海道国際交流 留学生奨学金
  • 2018年 Toshiba Memory Corporation Limited 1 million Yen
     Toshiba Memory Grant-in-Aid for the Encouragement of Young Scientist 
    受賞者: アンバラタンカンディ プラソン
  • 2017年 Japan Student Services Organization The Monbukagakusho Honors Scholarship
     
    受賞者: アンバラタンカンディ プラソン
  • 2009年 Marie Curie Initial Training Network Marie Curie Fellowship 2009-2012
     
    受賞者: アンバラタンカンディ プラソン


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