Tsutsui Hiroshi

Faculty of Information Science and Technology Media and Network Technologies Information Communication SystemsAssociate Professor
Institute for the Promotion of Business-Regional CollaborationAssociate Professor
Last Updated :2025/06/07

■Researcher basic information

Degree

  • Doctor of Informatics, Kyoto University

Researchmap personal page

Research Keyword

  • Wireless Communication
  • Processor Architecture
  • Image Processing
  • 電子回路CAD
  • 集積回路設計

Research Field

  • Manufacturing technology (mechanical, electrical/electronic, chemical engineering), Communication and network engineering
  • Manufacturing technology (mechanical, electrical/electronic, chemical engineering), Electronic devices and equipment
  • Informatics, Information networks
  • Informatics, Computer systems

Educational Organization

■Career

Career

  • Apr. 2019 - Present
    Hokkaido University, Faculty of Information Science and Technology, Associate Professor, Japan
  • May 2013 - Mar. 2019
    Hokkaido University, Graduate School of Information Science and Technology, Associate Professor, Japan
  • Apr. 2010 - Apr. 2013
    Kyoto University, Graduate School of Informatics, Assistant Professor
  • Apr. 2007 - Mar. 2010
    Osaka University, Graduate School of Information Science and Technology, Assistant Professor
  • Apr. 2005 - Mar. 2007
    Kyoto University, Graduate School of Informatics, Assistant Professor

Educational Background

  • Apr. 2000 - Mar. 2005, Kyoto University, Graduate School of Informatics, Department of Communications and Computer Engineering
  • Apr. 1996 - Mar. 2000, Kyoto University, Faculty of Engineering, School of Electrical and Electronic Engineering

Committee Memberships

  • Jan. 2016 - Present
    IEEE Hokkaido University Student Branch, Counselor, Society
  • Jan. 2021 - Dec. 2022
    IEEE Sapporo Section, Student Activities Committee Chair, Society
  • 2022
    SASIMI 2022 (The 24th Workshop on Synthesis And System Integration of Mixed Information technologies) Publication Chair
  • 2021
    SASIMI 2021 (The 23rd Workshop on Synthesis And System Integration of Mixed Information technologies), Publication Chair
  • 2021
    2021 International Symposium on Communications and Information Technologies (ISCIT 2021), Publication Chair, Others
  • 2021
    2021 International Workshop on Smart Info-Media Systems in Asia (SISA 2021), General Chair, Others
  • 2020
    IEEE TENCON 2020, Japan Sections Supporting Committee Member
  • 2019
    2019 IEEE International Symposium on Circuits and Systems (ISCAS 2019), Management Co-Chair, Others
  • May 2012 - May 2014
    電子情報通信学会 基礎境界ソサイエティ スマートインフォメディアシステム研究会, 幹事, Society
  • 2013 - 2013
    2013 International Workshop on Smart Info-Media Systems in Asia (SISA 2013), Technical Program Committee Member, Society
  • 2013
    ISPACS 2013, Publicity Chair, Society
  • May 2010 - May 2012
    電子情報通信学会 基礎境界ソサイエティ スマートインフォメディアシステム研究会, 幹事補佐, Society
  • 2012 - 2012
    2012 International Workshop on Smart Info-Media Systems in Asia (SISA 2012), Technical Program Committee Member, Society
  • 2011 - 2011
    2011 International Workshop on Smart Info-Media Systems in Asia (SISA 2011), Technical Program Committee Member, Society
  • 2011 - 2011
    2011 International Workshop on Smart Info-Media Systems in Asia (SISA 2011), General Secretary, Society
  • 2011 - 2011
    電子情報通信学会2011年ソサイエティ大会 プログラム編成委員会, 委員, Society
  • 2010 - 2010
    2010 International Workshop on Smart Info-Media Systems in Asia (SISA 2010), Technical Program Committee Member, Society
  • 2010 - 2010
    電子情報通信学会2010年ソサイエティ大会 プログラム編成委員会, 委員, Society
  • 2009 - 2009
    2009 International Workshop on Smart Info-Media Systems in Asia (SISA 2009), Technical Program Committee Member, Society
  • 2008 - 2008
    2008 International Workshop on Smart Info-Media Systems in Bangkok (SISB 2008), General Secretary, Society
  • 2007 - 2007
    SASIMI 2007, Technical Program Committee, Member, Society
  • 2006 - 2006
    ITC-CSCC 2006, General Secretary, Society

■Research activity information

Awards

  • Oct. 2013, SASIMI Organizing Committee, SASIMI 2013 Outstanding Paper Award               
    Place-and-Route Algorithms for a Reliability-Oriented Coarse-Grained Reconfigurable Architecture Using Time Redundancy
    Takashi Imagawa;Masayuki Hiromoto;Hiroshi Tsutsui;Hiroyuki Ochi;Takashi Sato, International society
  • Oct. 2009, IEEE/ACM/IFIP, 7th IEEE/ACM/IFIP Workshop on Embedded Systems for Real-Time Multimedia (ESTIMedia2009) Best Paper Award               
    A high-throughput pipelined architecture for JPEG XR encoding
    Koichi Hattori;Hiroshi Tsutsui;Hiroyuki Ochi;Yukihiro Nakamura, International society
  • Jul. 2008, IPSJ, Multimedia, Distributed, Cooperative and Mobile Symposium 2008 (DICOMO2008) Excellent Paper Award               
    Dynamic Rate Control for Media Streaming in High-speed Mobile Network
    Masayuki Hiromoto;Hiroshi Tsutsui;Hiroyuki Ochi;Tomoyuki Osano;Norihiro Ishikawa;Yukihiro Nakamura, Japan society
  • Sep. 2007, IEICE, IEICE Society Conference, Video Compression Contest, First Prize               
    Video Coding Scheme for Video Sequences Degraded by Noise of Old Motion Picture Films
    Hiroshi Tsutsui, Japan society
  • Sep. 2005, IEICE, IEICE Young Researcher's Award               
    Efficient SRAM Architecture for JPEG2000 Entropy Coder
    Hiroshi Tsutsui;Hiroki Sugano;Takahiko Masuzaki;Hiroyuki Ochi;Takao Onoye;Yukihiro Nakamura, Japan society
  • May 2001, PARTHENON Technical Society, PARTHENON Technical Society, ASIC Design Contest, Award of Excellence               
    Design of 16bit Free CPU
    Hiroshi Tsutsui;Takahiko Masuzaki, Japan society
  • May 2000, PARTHENON Technical Society, PARTHENON Technical Society, ASIC Design Contest, Encouragement Award               
    Design of 16bit Free CPU
    Ryusuke Miyamoto;Hiroshi Tsutsui;Ryuta Nakanishi, Japan society

Papers

  • Power Consumption and Prototype Evaluation of IoT Devices for Environmental Monitoring Systems.
    Kota Hirai, Hiroshi Tsutsui, Ying He, Takeo Ohgane
    ISCIT, 231, 234, 2023
    International conference proceedings
  • Experimental Evaluation and Field Tests of LoRa Energy Consumption Optimization Approach Using Software-Defined Radio               
    Kyotaro Kunii, Takuya Yasugi, Hiroshi Tsutsui, Takeo Ohgane
    Proceedings of International Workshop on Smart Info-Media Systems in Asia (SISA), 45, 50, Sep. 2022, [Peer-reviewed]
    English, International conference proceedings
  • Classification of Rich-Classes but Scarce-Samples Images via Multi-modeling: the Humpback Whale Epitome.
    Haojiong Wang, Hiroshi Tsutsui, Matteo Convertino
    4th IEEE Global Conference on Life Sciences and Technologies(LifeTech), 286, 288, IEEE, 2022
    International conference proceedings
  • A Feasibility Study on CNN-LSTM Based Phrase Speech Recognition Compared with LSTM and HMM
    Shingo Kato, Hiroshi Tsutsui
    Proceedings of International Workshop on Smart Info-Media Systems in Asia (SISA), 154, 157, Sep. 2021, [Peer-reviewed]
    English, International conference proceedings
  • An Evaluation of 5G LDPC Decoder Using Min-Sum Irregular LDPC Decoder Design Framework Considering Its QC-LDPC Structure
    Jimpu Suzuki, Hiroshi Tsutsui, Takeo Ohgane
    Proceedings of International Workshop on Smart Info-Media Systems in Asia (SISA), 71, 76, Sep. 2021, [Peer-reviewed]
    English, International conference proceedings
  • An Approach to Maximize SDMA Uplink Communication in an IoT Media Access Control Protocol               
    Atsuki Kuriyama, Hiroshi Tsutsui
    Proceedings of International Workshop on Smart Info-Media Systems in Asia (SISA), 49, 52, Dec. 2020, [Peer-reviewed]
    English, International conference proceedings
  • Wireless Channel Measurement System Using Zynq UltraScale+ RFSoC for MIMO and D2D Communication Systems
    Haruki Inaba, Hiroshi Tsutsui, Takuya Yasugi
    Asia-Pacific Signal and Information Processing Association Annual Summit and Conference(APSIPA), 135, 138, IEEE, Dec. 2020, [Peer-reviewed]
    English, International conference proceedings
  • An Evaluation of High-Throughput Scalable Radix-4 FFT Processor Architecture Using Fixed-Point Arithmetic
    Tomotaka Kawabata, Hiroshi Tsutsui
    Asia-Pacific Signal and Information Processing Association Annual Summit and Conference(APSIPA), 114, 117, IEEE, Dec. 2020, [Peer-reviewed]
    English, International conference proceedings
  • An Evaluation of Design Framework for Min-Sum Irregular LDPC Decoders
    Jimpu Suzuki, Hiroshi Tsutsui, Takeo Ohgane
    Asia-Pacific Signal and Information Processing Association Annual Summit and Conference(APSIPA), 110, 113, IEEE, Dec. 2020, [Peer-reviewed]
    English, International conference proceedings
  • An Evaluation of a CNN-Based Parking Detection System with Webcams
    Takuto Fukusaki, Hiroshi Tsutsui, Takeo Ohgane
    Asia-Pacific Signal and Information Processing Association Annual Summit and Conference(APSIPA), 100, 103, IEEE, Dec. 2020, [Peer-reviewed]
    English, International conference proceedings
  • WiFi Fingerprint Based Indoor Positioning Systems Using Estimated Reference Locations
    Myat Hsu AUNG, Hiroshi TSUTSUI, Yoshikazu MIYANAGA
    IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E103.A, 12, 1483, 1493, Institute of Electronics, Information and Communications Engineers (IEICE), 01 Dec. 2020
    Scientific journal
  • Robot Speech Recognition of Child Isolated Words               
    Yoshikazu Miyanaga, Yu Tian, Hiroshi Tsutsui
    International STEM Education Conference (iSTEM-Ed 2020), Nov. 2020, [Peer-reviewed]
    English, International conference proceedings
  • An Evaluation of Stack Light Indicator Color Detection System Using Web Cameras for Automatic Production Lines
    Hiroshi Tsutsui, Kentaro Yamada, Akihiro Sudou, Yoshikazu Miyanaga
    2019 Asia-Pacific Signal and Information Processing Association Annual Summit and Conference (APSIPA ASC), 1423, 1426, Nov. 2019, [Peer-reviewed]
    International conference proceedings
  • Improvement on Children Speech Recognition under Low Signal-to-Noise Ratio Environment               
    Yu Tian, Jiayue Tang, Hiroshi Tsutsui, Yoshikazu Miyanaga
    Proceedings of International Symposium on Multimedia and Communication Technology (ISMAC), 4, 6, Aug. 2019, [Peer-reviewed]
    English, International conference proceedings
  • Robust Isolated Speech Recognition for Keyword Detection System Using Hidden Markov Model               
    Jiayue Tang, Yu Tian, Hiroshi Tsutsui, Yoshikazu Miyanaga
    Proceedings of International Symposium on Multimedia and Communication Technology (ISMAC), 161, 163, Aug. 2019, [Peer-reviewed]
    English, International conference proceedings
  • Voice Activity Detection Using Running Spectrum Analysis for Noise Robust Speech Recognition               
    Riku Takanashi, Tatsuya Nakagoshi, Noboru Hayasaka, Yoshikazu Miyanaga, Hiroshi Tsutsui
    Proceedings of International Symposium on Multimedia and Communication Technology (ISMAC), 164, 166, Aug. 2019, [Peer-reviewed]
    English, International conference proceedings
  • Construction and Management of Fingerprint Database with Estimated Reference Locations for WiFi Indoor Positioning Systems
    Myat Hsu Aung, Hiroshi Tsutsui, Yoshikazu Miyanaga
    Proceedings of the 23rd Multi-conference on Systemics, Cybernetics and Informatics (WMSCI 2019), 2, 7, 10, Jul. 2019, [Peer-reviewed]
    English, International conference proceedings
  • An Architecture for Real-Time Retinex-Based Image Enhancement and Haze Removal and Its FPGA Implementation
    Dabwitso KASAUKA, Kenta SUGIYAMA, Hiroshi TSUTSUI, Hiroyuki OKUHATA, Yoshikazu MIYANAGA
    IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, E102.A, 6, 775, 782, 01 Jun. 2019, [Peer-reviewed]
    English, Scientific journal
  • Development of High Performance RF Modules Used in Real-time FHD Video Communication over 8x8 MIMO-OFDM System
    Yoshikazu Miyanaga, Masaki Miura, Tohru Gotoh, Junji Yamano, Takashi Imagawa, Hiroshi Tsutsui
    2018 International Symposium on Intelligent Signal Processing and Communication Systems (ISPACS), 107, 110, IEEE, Nov. 2018, [Peer-reviewed]
    International conference proceedings
  • An Evaluation of Keyword Detection Using ACF of Pitch for Robust Speech Recognition
    Jiayue Tang, Yu Tian, Xiaonan Jiang, Hiroshi Tsutsui, Yoshikazu Miyanaga
    2018 18th International Symposium on Communications and Information Technologies (ISCIT), IEEE, Sep. 2018, [Peer-reviewed]
    International conference proceedings
  • Keyword Detection Using F0-VAD in Robust Isolated Phase Recognition System               
    Jiayue Tang, Yu Tian, Xiaonan Jiang, Hiroshi Tsutsui, Yoshikazu Miyanaga
    Proceedings of International Symposium on Multimedia and Communication Technology (ISMAC), 121, 124, Aug. 2018, [Peer-reviewed]
    English, International conference proceedings
  • Robust Children Isolated Speech Recognition System Using RSA and RSF               
    Yu Tian, Jiayue Tang, Xiaonan Jiang, Hiroshi Tsutsui, Yoshikazu Miyanaga
    Proceedings of International Symposium on Multimedia and Communication Technology (ISMAC), 113, 116, Aug. 2018, [Peer-reviewed]
    English, International conference proceedings
  • An Evaluation of Entropy Coding Approaches in Block-Based Adaptive Lossless Image Coding Method for Embedded Systems               
    Yunako Katagishi, So Tsuyuguchi, Hiroshi Tsutsui, Yoshikazu Miyanaga
    Proceedings of International Symposium on Multimedia and Communication Technology (ISMAC), Aug. 2018, [Peer-reviewed]
    English, International conference proceedings
  • A Study of Pipelined Hardware Design of Matrix Inversion for Signal Separation in MIMO-OFDM Wireless Communication
    Takashi Imagawa, Takahiro Ikeshita, Hiroshi Tsutsui, Yoshikazu Miyanaga
    IEICE Technical Report, Nov. 2017
    Japanese
  • Robust Isolated Phrase Recognition System Using Running Spectrum Analysis               
    Xiaonan Jiang, Tatsuya Nakagoshi, George Mufungulwa, Hiroshi Tsutsui, Yoshikazu Miyanaga, Shini-ichi Abe
    Proceedings of Intelligent Transportation Society of America World Congress (ITS 2017), Oct. 2017, [Peer-reviewed]
    English, International conference proceedings
  • Robust speech recognition for similar Japanese pronunciation phrases under noisy conditions
    George Mufungulwa, Hiroshi Tsutsui, Yoshikazu Miyanaga, Shin-Ichi Abe, Mitsuru Ochi
    ISSCS 2017 - International Symposium on Signals, Circuits and Systems, Institute of Electrical and Electronics Engineers Inc., 12 Sep. 2017, [Peer-reviewed]
    English, International conference proceedings
  • An Evaluation of Phrase Rejection Using K-means Clustering for Robust Speech Recognition               
    Xiaonan Jiang, Tatsuya Nakagoshi, Noboru Hayasaka, Hiroshi Tsutsui, Yoshikazu Miyanaga
    Proceedings of International Workshop on Smart Info-Media Systems in Asia (SISA), 154, 157, Sep. 2017, [Peer-reviewed]
    English, International conference proceedings
  • An Accuracy Evaluation of WiFi Based Indoor Positioning System Using Estimated Reference Locations               
    Myat Hsu Aung, Hiroshi Tsutsui, Yoshikazu Miyanaga
    Proceedings of International Workshop on Smart Info-Media Systems in Asia (SISA), 321, 326, Sep. 2017, [Peer-reviewed]
    English, International conference proceedings
  • An Evaluation of Foreground Extraction Using Background Subtraction and GrabCut               
    Kentaro Yamada, Hiroshi Tsutsui, Yoshikazu Miyanaga
    Proceedings of International Symposium on Multimedia and Communication Technology (ISMAC), 27, 30, Aug. 2017, [Peer-reviewed]
    English, International conference proceedings
  • Low-Cost Adaptive Block-Based Lossless Compression Method for Memory Bandwidth Reduction               
    So Tsuyuguchi, Hiroshi Tsutsui, Yoshikazu Miyanaga
    Proceedings of International Symposium on Multimedia and Communication Technology (ISMAC), 97, 100, Aug. 2017, [Peer-reviewed]
    English, International conference proceedings
  • Robust Speech Recognition Using Low-pass Processing RSA in the Frequency Domain               
    Tatsuya Nakagoshi, Xiaonan Jiang, Hiroshi Tsutsui, Yoshikazu Miyanaga
    Proceedings of International Symposium on Multimedia and Communication Technology (ISMAC), 139, 142, Aug. 2017, [Peer-reviewed]
    English, International conference proceedings
  • An Implementation of WiFi Based Indoor Positioning System Using Estimated Reference Locations
    Myat Hsu Aung, Hiroshi Tsutsui, Yoshikazu Miyanaga
    GI-CoRE GSQ, GSB & IGM Joint Symposium, Jul. 2017
    English
  • Enhanced Running Spectrum Analysis for Robust Speech Recognition Under Adverse Conditions: Case of Japanese Speech               
    George Mufungulwa, Hiroshi Tsutsui, Yoshikazu Miyanaga, Shini-ichi Abe
    ECTI Transactions on Computer and Information Technology (ECTI-CIT), Jul. 2017, [Peer-reviewed]
    English, Scientific journal
  • An Evaluation of Atmospheric Light Estimation in Haze Removal Method Using Variational Model Based Transmission Map Estimation               
    Kenta Sugiyama, Takashi Imagawa, Hiroshi Tsutsui, Yoshikazu Miyanaga
    Proceedings of Workshop on Circuits and Systems, 57, 60, May 2017
    Japanese
  • Speech Recognition Using TVLPC Based MFCC for Similar Pronunciation Phrases               
    George Mufungulwa, Alia Asheralieva, Hiroshi Tsutsui, Shini-ichi Abe, Yoshikazu Miyanaga
    Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS), 1918, 1921, May 2017, [Peer-reviewed]
    English, International conference proceedings
  • An FPU-based hardware implementation of Gauss-Jordan matrix inversion operation for MIMO-OFDM demodulation               
    Takahiro Ikeshita, Takashi Imagawa, Hiroshi Tsutsui, Yoshikazu Miyanaga
    Joint Conference of Electrical, Electronics and Information Engineers in Hokkaido, 174, 175, Nov. 2016
    Japanese
  • An Evaluation of Haze Removal Method Using Variational Model Based Transmission Map Estimation               
    Kenta Sugiyama, Takashi Imagawa, Hiroshi Tsutsui, Yoshikazu Miyanaga
    IEICE Society Conference, Sep. 2016
    Japanese
  • Robust Speech Recognition using MFCC with Triangular Mel Filtered Time Varying LPC               
    George Mufungulwa, Hiroshi Tsutsui, Alia Asheralieva, Yoshikazu Miyanaga
    IEICE Society Conference, Sep. 2016
    English
  • An Accuracy Evaluation of Motion-Compensated Frame Interpolation Using High-Resolution Video and High-Frame-Rate Video               
    Hiroki Uesaka, Takashi Imagawa, Hiroshi Tsutsui, Yoshikazu Miyanaga
    Proceedings of International Workshop on Smart Info-Media Systems in Asia (SISA), Sep. 2016, [Peer-reviewed]
    English, International conference proceedings
  • One-block shared memory FFT processor by using new memory addressing approach               
    Licheng Rao, Shingo Yoshizawa, Hiroshi Tsutsui, Yoshikazu Miyanaga
    Proceedings of International Symposium on Multimedia and Communication Technology (ISMAC), Aug. 2016, [Peer-reviewed]
    English, International conference proceedings
  • New MFCC with Triangular Mel Filtered Time Varying LPC               
    George Mufungulwa, Alia Asheralieva, Hiroshi Tsutsui, Yoshikazu Miyanaga
    Proceedings of International Symposium on Multimedia and Communication Technology (ISMAC), Aug. 2016, [Peer-reviewed]
    English, International conference proceedings
  • Speech Recognition using MFCC with Time Varying LPC for Similar Pronunciation Phrases               
    George Mufungulwa, Alia Asheralieva, Hiroshi Tsutsui, Yoshikazu Miyanaga
    The 31st International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), Jul. 2016, [Peer-reviewed]
    English, International conference proceedings
  • Two-steps Process Speech Recognition System for Similar Pronunciation Phrases under Noise Environment
    Na Zhu, Yoshikazu Miyanaga, Hiroshi Tsutsui, Masumi Watanabe
    IEICE Technical Report, 116, 81, 61, 64, 電子情報通信学会, Jun. 2016
    English
  • New Speech Features Based on time-varying LPC for Robust Automatic Speech Recognition
    George Mufungulwa, Alia Asheralieva, Hiroshi Tsutsui, Yoshikazu Miyanaga
    IEICE Technical Report, 116, 81, 55, 59, 電子情報通信学会, Jun. 2016
    English
  • An Evaluation of Data Traffic Reduction for 3D Reconstruction Using a Wireless Network Camera System               
    Hikaru Aoki, Takashi Imagawa, Hiroshi Tsutsui, Yoshikazu Miyanaga
    Proceedings of IEICE Hokkaido Section Student Council Internet Symposium, Feb. 2016
    Japanese
  • An Evaluation of Frame-based Parallel Processing for Iterative Shrinkage Smoothing Using Multi-core Processor               
    Seijiro Imai, Dabwitso Kasauka, Takashi Imagawa, Hiroshi Tsutsui, Hiroyuki Okuhata, Yoshikazu Miyanaga
    Proceedings of IEICE Hokkaido Section Student Council Internet Symposium, Feb. 2016
    Japanese
  • Image Smoothing in the Spatial Domain Using Multigrid Conjugate Gradient Methods Based on Accelerated Iterative Shrinkage
    Dabwitso Kasauka, Hiroshi Tsutsui, Seijiro Imai, Takashi Imagawa, Hiroyuki Okuhata, Yoshikazu Miyanaga
    2016 ASIA-PACIFIC SIGNAL AND INFORMATION PROCESSING ASSOCIATION ANNUAL SUMMIT AND CONFERENCE (APSIPA), 1, 5, 2016, [Peer-reviewed]
    English, International conference proceedings
  • Processing Time Reduction of Tone Mapping Based on Iterative Shrinkage Smoothing Using Parallel Processing
    Seijiro Imai, Dabwitso Kasauka, Hiroshi Tsutsui, Takashi Imagawa, Hiroyuki Okuhata, Yoshikazu Miyanaga
    2016 INTERNATIONAL SYMPOSIUM ON INTELLIGENT SIGNAL PROCESSING AND COMMUNICATION SYSTEMS (ISPACS), 211, 214, 2016, [Peer-reviewed]
    English, International conference proceedings
  • An Evaluation of High Quality Synchronization Method Based on Delayed and Symmetric Correlation in MIMO-OFDM
    Sukeyuki Iwata, Masahito Umehara, Takashi Imagawa, Hiroshi Tsutsui, Yoshikazu Miyanaga
    IEICE Technical Report, 115, 348, 73, 76, Dec. 2015
    Japanese
  • Processing Time Reduction of Iterative Shrinkage Smoothing Using Parallel Processing
    Seijiro Imai, Dabwitso Kasauka, Takashi Imagawa, Hiroshi Tsutsui, Hiroyuki Okuhata, Yoshikazu Miyanaga
    IEICE Technical Report, 115, 348, 57, 60, Dec. 2015
    Japanese
  • Image Shrinking Based Computational Cost Reduction of Moving Area Extraction Using Global Motion Estimation with KLT Tracker and Background Subtraction
    Shingo Kokami, Takashi Imagawa, Hiroshi Tsutsui, Yoshikazu Miyanaga
    IEICE Technical Report, 115, 348, 95, 98, 電子情報通信学会, Dec. 2015
    Japanese
  • An Evaluation for Appropriate Camera Selection in 3D Reconstruction System Using Multiple Cameras
    Hikaru Aoki, Takashi Imagawa, Hiroshi Tsutsui, Yoshikazu Miyanaga
    IEICE Technical Report, 115, 348, 53, 56, Dec. 2015
    Japanese
  • An Accuracy Evaluation of Frame Interpolation Method Using High-Resolution Video and High-Frame Rate Video
    Hiroki Uesaka, Takashi Imagawa, Hiroshi Tsutsui, Yoshikazu Miyanaga
    IEICE Technical Report, 115, 348, 89, 94, Dec. 2015
    Japanese
  • A Power Allocation Method in OFDMA System               
    Wenheng Zhang, Alia Asheralieva, Gengfa Fang, Hiroshi Tsutsui, Yoshikazu Miyanaga
    Joint Conference of Electrical, Electronics and Information Engineers in Hokkaido, Nov. 2015
    English
  • An evaluation of high quality synchronization method in MIMO-OFDM using measured value               
    Sukeyuki Iwata, Takashi Imagawa, Hiroshi Tsutsui, Yoshikazu Miyanaga
    Joint Conference of Electrical, Electronics and Information Engineers in Hokkaido, Nov. 2015
    Japanese
  • Performance Evaluation of Carrier and Sampling Frequency Offset Compensation Using Measured Data in MIMO-OFDM Systems
    Shinya Moriyama, Kosuke Morinaga, Takashi Imagawa, Hiroshi Tsutsui, Yoshikazu Miyanaga, Masaki Miura, Tohru Gotoh, Junji Yamano
    IEICE Technical Report, 115, 208, 31, 36, Sep. 2015
    Japanese
  • Image Shrinking Based Computational Cost Reduction of Moving Area Extraction with Global Motion Estimation and Background Subtraction               
    Shingo Kokami, Takashi Imagawa, Hiroshi Tsutsui, Yoshikazu Miyanaga
    IEICE Society Conference, 143, Sep. 2015
    Japanese
  • Computational Cost Reduction of Iterative Shrinkage Smoothing Based Image Enhancement               
    Seijiro Imai, Dabwitso Kasauka, Takashi Imagawa, Hiroshi Tsutsui, Hiroyuki Okuhata, Yoshikazu Miyanaga
    IEICE Society Conference, 144, Sep. 2015
    Japanese
  • An Evaluation of Motion Compensated Frame Interpolation from Multiple Resolution and Multiple Frame Rate Video Based on Global Motion               
    Hiroki Uesaka, Takashi Imagawa, Hiroshi Tsutsui, Yoshikazu Miyanaga
    IEICE Society Conference, 145, Sep. 2015
    Japanese
  • An Evaluation towards Highly Efficient 3D Reconstruction Using Multiple Cameras               
    Hikaru Aoki, Takashi Imagawa, Hiroshi Tsutsui, Yoshikazu Miyanaga
    IEICE Society Conference, 147, Sep. 2015
    Japanese
  • A Feasibility Study of a Flexible OFDM Transmitter Towards an Adaptive Control of Communication Quality               
    Takashi Imagawa, Hiroshi Tsutsui, Yoshikazu Miyanaga
    Proceedings of International Symposium on Multimedia and Communication Technology (ISMAC), 77, 79, Sep. 2015, [Peer-reviewed]
    English, International conference proceedings
  • Carrier and Sampling Frequency Offset Compensation in 8×8 MIMO-OFDM Systems and its Performance Evaluation Using Measured Data               
    Shinya Moriyama, Kosuke Morinaga, Takashi Imagawa, Hiroshi Tsutsui, Yoshikazu Miyanaga, Masaki Miura, Tohru Gotoh, Junji Yamano
    Proceedings of International Symposium on Multimedia and Communication Technology (ISMAC), 73, 76, Sep. 2015, [Peer-reviewed]
    English, International conference proceedings
  • 画像処理装置、画像処理方法及び画像処理用プログラム               
    Hiroshi Tsutsui, Hiroki Uesaka, Shingo Kokami
    2015年8月21日 特願2015-163487, Aug. 2015
    Japanese
  • Experimental Validation of Minimum Operating-voltage-estimation for Low Supply Voltage Circuits
    Takashi Sato, Junya Kawashima, Hiroshi Tsutsui, Hiroyuki Ochi
    PROCEEDINGS OF THE FIFTEENTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED 2014), 428, +, 2015, [Peer-reviewed]
    English, International conference proceedings
  • Image Smoothing Using Spatial Iterative Methods Based on Accelerated Iterative Shrinkage
    Dabwitso Kasauka, Hiroshi Tsutsui, Hiroyuki Okuhata, Takashi Imagawa, Yoshikazu Miyanaga
    2015 ASIA-PACIFIC SIGNAL AND INFORMATION PROCESSING ASSOCIATION ANNUAL SUMMIT AND CONFERENCE (APSIPA), 779, 783, 2015, [Peer-reviewed]
    English, International conference proceedings
  • Incorporation of Time-Varying LP Cepstral Features in HMM-Based Isolated Word Speech Recognition
    Federico Ang, Hiroshi Tsutsui, Yoshikazu Miyanaga
    2015 INTERNATIONAL SYMPOSIUM ON SIGNALS, CIRCUITS AND SYSTEMS (ISSCS), 1, 4, 2015, [Peer-reviewed]
    English, International conference proceedings
  • Time-Varying LP Cepstral Features for Improved Isolated Word Speech Recognition
    Federico Ang, Hiroshi Tsutsui, Yoshikazu Miyanaga
    2015 IEEE INTERNATIONAL CONFERENCE ON DIGITAL SIGNAL PROCESSING (DSP), 302, 306, 2015, [Peer-reviewed]
    English, International conference proceedings
  • An FPGA Implementation of Low-latency Video Transmission System Using Lossless and Near-lossless Line-based Compression
    Takahiro Inatsuki, Masato Matsuura, Kosuke Morinaga, Hiroshi Tsutsui, Yoshikazu Miyanaga
    2015 IEEE INTERNATIONAL CONFERENCE ON DIGITAL SIGNAL PROCESSING (DSP), 1062, 1066, 2015, [Peer-reviewed]
    English, International conference proceedings
  • An Approach of Doppler-Tolerant Channel Estimation Using RLS Algorithm for MIMO-OFDM Systems               
    Masahito Umehara, Hiroshi Tsutsui, Yoshikazu Miyanaga
    Proceedings of International Workshop on Smart Info-Media Systems in Asia (SISA), 197, 202, Oct. 2014, [Peer-reviewed]
    English, International conference proceedings
  • Doppler-Resistant Channel Estimation Method Using RLS Algorithm for MIMO-OFDM Systems
    Masahito Umehara, Hiroshi Tsutsui, Yoshikazu Miyanaga
    IEICE Technical Report, 114, 126(SIS), 135, 140, The Institute of Electronics, Information and Communication Engineers, Jul. 2014
    Japanese, Frequency deviation by the Doppler shift in the multipath environment deteriorates the demodulation accuracy significantly. In this paper, we introduce the recursive least squares (RLS) algorithm which is one of the adaptive algorithms for MIMO detector of multiple-input multiple-output - orthogonal frequency division multiplexing (MIMO-OFDM) systems and propose a channel estimation method which has a Doppler resistance. In addition, we focus on the preamble structure of transmission frames to improve further demodulation accuracy. As a result, we report that the channel estimation accuracy is improved utilizing the extension high throughput - long training field (HT-LTF).
  • Effect of Receiver Diversity in IDMA Outdoor Transmission Experiment               
    Shingo Yoshizawa, Yasuyuki Hatakawa, Satoshi Konishi, Yuki Hikiyama, Hiroki Iwaizumi, Hiroshi Tsutsui, Yoshikazu Miyanaga
    IEICE General Conference, 441, Mar. 2014
    Japanese
  • Characteristic Evaluation of IDMA in Outdoor Transmission Experiment               
    Yuki Hikiyama, Hiroki Iwaizumi, Shingo Yoshizawa, Yasuyuki Hatakawa, Satoshi Konishi, Hiroshi Tsutsui, Yoshikazu Miyanaga
    IEICE General Conference, 440, Mar. 2014
    Japanese
  • Overview of Outdoor Transmission Experiment of IDMA               
    Yasuyuki Hatakawa, Satoshi Konishi, Shingo Yoshizawa, Hiroki Iwaizumi, Yuki Hikiyama, Hiroshi Tsutsui, Yoshikazu Miyanaga
    IEICE General Conference, 439, Mar. 2014
    Japanese
  • Computational Cost Analysis and Implementation of Accelerated Iterative Shrinkage Smoothing
    Dabwitso Kasauka, Hiroshi Tsutsui, Hiroyuki Okuhata, Yoshikazu Miyanaga
    2014 ASIA-PACIFIC SIGNAL AND INFORMATION PROCESSING ASSOCIATION ANNUAL SUMMIT AND CONFERENCE (APSIPA), 1, 4, 2014, [Peer-reviewed]
    English, International conference proceedings
  • VIDEO WIRELESS COMMUNICATION BASED ON HIGH SPEED 8 x 8 MIMO-OFDM SYSTEM
    Hiroki Lwaiztani, Masahiro Sugnani, Baiko Sai, Hiroshi Tsutsui, Voshikazu Miyanaga
    2014 6TH INTERNATIONAL SYMPOSIUM ON COMMUNICATIONS, CONTROL AND SIGNAL PROCESSING (ISCCSP), 586, 589, 2014, [Peer-reviewed]
    English, International conference proceedings
  • Development of 8x8 MIMO-OFDM System Using 9-Step MIMO Detector
    Masahiro Sugitani, Hiroki Iwaizumi, Baiko Sai, Hiroshi Tsutsui, Yoshikazu Miyanaga
    IEICE Technical Report, 113, 343, 41, 46, The Institute of Electronics, Information and Communication Engineers, Dec. 2013
    Japanese, An 8×8 MIMO-OFDM system is designed to achieve a large capacity and high-speed communication system. However, it is needed to reduce circuit scale and power consumption since the receiver needs huge calculation cost in interference cancellation. In this paper, we introduce Strassen's algorithm in a part of MIMO detection inverse matrix calculation process to reduce the calculation cost. Also, we designed an 9-step MIMO detector which reduces circuit scale by dividing all calculation into 9 steps in MMSE weight matrix calculator. We propose a low-power 8×8 MIMO-OFDM wireless communication system with performance evaluation results.
  • Design of Highly Accurate 8x8 MIMO-OFDM System Using ASIP
    Hiroki Iwaizumi, Masahiro Sugitani, Baiko Sai, Hiroshi Tsutsui, Yoshikazu Miyanaga
    IEICE Technical Report, 113, 343, 35, 40, The Institute of Electronics, Information and Communication Engineers, Dec. 2013
    Japanese, In this paper, we propose a hardware design of highly accurate 8×8 multiple-input multiple-output - or -thogonal frequency division multiplexing (MIMO-OFDM) system which has floating-point processors in its receiver. For hardware design of MIMO-OFDM systems, it is efficient to use fixed-point processing in terms of processing speed and power consumption. However, in poor environments, floating-point processing is necessary since highly accurate processing is required for MIMO decoding. In this research, we have realized high accuracy and realtime processing of MIMO decoding by employing application specific instruction-set processor (ASIP) and making algorithm more efficient.
  • Study of PAPR reduction using coded PTS in 8x8 MIMO-OFDM systems
    Yuya Inoue, Hiroshi Tsutsui, Yoshikazu Miyanaga
    ISPACS 2013 - 2013 International Symposium on Intelligent Signal Processing and Communication Systems, 363, 368, Nov. 2013, [Peer-reviewed]
    English, International conference proceedings
  • Place-and-Route Algorithms for a Reliability-Oriented Coarse-Grained Reconfigurable Architecture Using Time Redundancy               
    Takashi Imagawa, Masayuki Hiromoto, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    Proc. of the 18th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI2013), 76, 81, Oct. 2013, [Peer-reviewed]
    English, International conference proceedings
  • An Evaluation of Channel Estimation Using RLS Algorithm in MIMO-OFDM Systems               
    Masahito Umehara, Baiko Sai, Hiroshi Tsutsui, Yoshikazu Miyanaga
    Proceedings of International Workshop on Smart Info-Media Systems in Asia (SISA), 145, 150, Oct. 2013, [Peer-reviewed]
    English, International conference proceedings
  • An evaluation of wireless video transmission using lossless video compression and 8×8 MIMO-OFDM wireless transceiver
    Kosuke Morinaga, Hiroshi Tsutsui, Yoshikazu Miyanaga
    13th International Symposium on Communications and Information Technologies: Communication and Information Technology for New Life Style Beyond the Cloud, ISCIT 2013, 685, 690, Sep. 2013, [Peer-reviewed]
    English, International conference proceedings
  • MIMO propagation scenario discrimination for adaptive wireless communication systems
    Yuki Hikiyama, Hiroshi Tsutsui, Yoshikazu Miyanaga
    13th International Symposium on Communications and Information Technologies: Communication and Information Technology for New Life Style Beyond the Cloud, ISCIT 2013, 674, 679, Sep. 2013, [Peer-reviewed]
    English, International conference proceedings
  • Robust speech recognition for similar pronunciation phrases using MMSE under noise environments
    Masumi Watanabe, Hiroshi Tsutsui, Yoshikazu Miyanaga
    13th International Symposium on Communications and Information Technologies: Communication and Information Technology for New Life Style Beyond the Cloud, ISCIT 2013, 802, 807, Sep. 2013, [Peer-reviewed]
    English, International conference proceedings
  • Realtime transmission of full high-definition 30 frames/s videos over 8×8 MIMO-OFDM channels using HACP-based lossless coding
    Masato Matsuura, Hiroshi Tsutsui, Yoshikazu Miyanaga
    13th International Symposium on Communications and Information Technologies: Communication and Information Technology for New Life Style Beyond the Cloud, ISCIT 2013, 797, 801, Sep. 2013, [Peer-reviewed]
    English, International conference proceedings
  • Failure mode analysis for flip-flops at low voltages
    Takafumi Fujita, Junya Kawashima, Masayuki Hiromoto, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    IEICE Technical Report, 113, 112, 129, 134, 電子情報通信学会, Jul. 2013
    Japanese
  • A Random Walk Based Power Supply Network Analysis Utilizing Quasi Zero Variance Importance Sampling and Error Smoothing
    Tsuyoshi Okazaki, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    in Proc. of Workshop on Circuits and Systems, 26, 472, 477, [電子情報通信学会], Jul. 2013, [Peer-reviewed]
    Japanese, International conference proceedings
  • Complexity Based Adaptive Sampling for Compressive Sensing Image Sensors
    Takafumi Fujita, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    in Proc. of Workshop on Circuits and Systems, 26, 397, 402, [電子情報通信学会], Jul. 2013, [Peer-reviewed]
    Japanese, International conference proceedings
  • A correlational study between most probable failure point and yield in SRAM circuit analysis
    Kazunori Kimura, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    in Proc. of Workshop on Circuits and Systems, 26, 374, 379, [電子情報通信学会], Jul. 2013, [Peer-reviewed]
    Japanese, International conference proceedings
  • [Tutorial Lecture] Design Case Study of Image Processing Hardware IP -- Development of Retinex-based Image Enhancement IP Core --
    Hiroshi Tsutsui
    IEICE Technical Report, 113, 78, 47, 52, The Institute of Electronics, Information and Communication Engineers, Jun. 2013
    Japanese, In recent years, the demand for image processing has been growing steadily with the wide use of digital imaging devices such as smart phones and camcorders. In the case of image processing for video data, since the amount of data per unit time is relatively large, it is implemented in hardware instead of software especially when real-time processing is required. This paper provides an overview of image processing IP core design using a development case of Retinex-based adaptive image enhancement IP core.
  • Histogram Propagation Based Statistical Timing Analysis Using Dependent Node Selection               
    Shiyi Zhang, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    The 28th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), 321, 324, Jun. 2013, [Peer-reviewed]
    English, International conference proceedings
  • Architecture for Sealed Wafer-scale Mask ROM for Long-term Digital Data Preservation               
    Shinya Matsuda, Takashi Imagawa, Hiroshi Tsutsui, Takashi Sato, Yukihiro Nakamura, Hiroyuki Ochi
    The 28th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), 274, 277, Jun. 2013, [Peer-reviewed]
    English, International conference proceedings
  • Fast and memory-efficient GPU implementations of Krylov subspace methods for efficient power grid analysis
    Takumi Morishita, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI, 95, 100, May 2013, [Peer-reviewed]
    English, International conference proceedings
  • A Cost-Effective Selective TMR for Coarse-Grained Reconfigurable Architectures Based on DFG-Level Vulnerability Analysis
    Takashi Imagawa, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    IEICE TRANSACTIONS ON ELECTRONICS, E96C, 4, 454, 462, Apr. 2013, [Peer-reviewed]
    English, Scientific journal
  • Parallel Acceleration Scheme for Monte Carlo Based SSTA Using Generalized STA Processing Element
    Hiroshi Yuasa, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    IEICE TRANSACTIONS ON ELECTRONICS, E96C, 4, 473, 481, Apr. 2013, [Peer-reviewed]
    English, Scientific journal
  • Comparison of energy consumption of latches of different topologies
    Takafumi Fujita, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    IEICE General Conference, 2013, 78, Mar. 2013
    Japanese
  • Evaluation of Dependent Node Selection of Histogram Propagation Based Statistical Timing Analysis               
    Shiyi Zhang, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    Proceedings of the 2013 IEICE general conference, Fundamentals on Electronics, Communications and Computer Sciences, 62, Mar. 2013
    English
  • Consistency enforcement of node voltages for thread parallel implementation of random-walk-based linear circuit analysis
    Tsuyoshi Okazaki, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    IEICE General Conference, 2013, 61, Mar. 2013
    Japanese
  • Multi-trap RTN Parameter Extraction based on Bayesian Inference
    Hiromitsu Awano, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    PROCEEDINGS OF THE FOURTEENTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED 2013), 597, 602, Mar. 2013, [Peer-reviewed]
    English, International conference proceedings
  • High-speed DFG-level SEU Vulnerability Analysis for Applying Selective TMR to Resource-Constrained CGRA
    Takashi Imagawa, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    PROCEEDINGS OF THE FOURTEENTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED 2013), 538, 545, 2013, [Peer-reviewed]
    English, International conference proceedings
  • A Cost-Effective Selective TMR for Heterogeneous Coarse-Grained Reconfigurable Architectures based on DFG-Level Vulnerability Analysis
    Takashi Imagawa, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    DESIGN, AUTOMATION & TEST IN EUROPE, 701, 706, 2013, [Peer-reviewed]
    English, International conference proceedings
  • Hot-Swapping Architecture with Back-biased Testing for Mitigation of Permanent Faults in Functional Unit Array
    Zoltan Endre Rakossy, Masayuki Hiromoto, Hiroshi Tsutsui, Takashi Sato, Yukihiro Nakamura, Hiroyuki Ochi
    DESIGN, AUTOMATION & TEST IN EUROPE, 535, 540, 2013, [Peer-reviewed]
    English, International conference proceedings
  • Realization of frequency-domain circuit analysis through random walk
    Tetsuro Miyakawa, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, 169, 174, Jan. 2013, [Peer-reviewed]
    English, International conference proceedings
  • Bayesian Estimation of Multi-Trap RTN Parameters Using Markov Chain Monte Carlo Method
    Hiromitsu Awano, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, E95A, 12, 2272, 2283, Dec. 2012, [Peer-reviewed]
    English, Scientific journal
  • A Variability-Aware Energy-Minimization Strategy for Subthreshold Circuits
    Junya Kawashima, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, E95A, 12, 2242, 2250, Dec. 2012, [Peer-reviewed]
    English, Scientific journal
  • Accurate I/O Buffer Impedance Self-Adjustment using Vth and Temperature Sensors
    Zhi Li, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    IEICE Technical Report, 112, 320, 117, 122, The Institute of Electronics, Information and Communication Engineers, Nov. 2012
    English, With the increased operating frequency and the reduction of feature size, achieving low error-rate data transmission between LSIs is an important field of research. In particular, input/output (I/O) impedance matching, as one of the necessary technologies for high-speed transmission, is strongly required. In this paper, we propose an architecture of output buffer whose impedance is self-adjustable against process variation and temperature characteristic of MOS transistors. The proposed architecture utilizes on-chip sensor circuits to capture threshold voltages and temperatures. Based on a commercial 65 nm CMOS technology. The proposed method has been verified. Without the use of reference resistor, it successfully adjusts the I/O impedance within 2.36% and 1.4% around a target of 50Ω through simulation and measurement, respectively, regardless of the process parameters and temperature.
  • Estimation of Model Parameters for Random Telegraph Noise Based on Information Criterion
    Hirofumi Shimizu, Hiromitsu Awano, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    in Proc. of IPSJ DA Symposium, 2012, 5, 49, 54, Aug. 2012, [Peer-reviewed]
    Japanese, International conference proceedings
  • Fast GPU Implementations of Krylov Subspace Methods for Power Grid Analysis
    Takumi Morishita, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    in Proc. of Workshop on Circuits and Systems, 25, 432, 437, [電子情報通信学会], Jul. 2012, [Peer-reviewed]
    Japanese, International conference proceedings
  • A Study for Improving Minimum Operation Voltage and Its Estimation Accuracy               
    Junya Kawashima, Hiroyuki Ochi, Hiroshi Tsutsui, Takashi Sato
    in Proc. of Workshop on Circuits and Systems, 313, 318, Jul. 2012, [Peer-reviewed]
    Japanese, International conference proceedings
  • An Approach for Deinterlacing using Cost Optimaization and Motion Detection History
    Tatsuo Maeno, Hiroshi Tsutsui, Takao Onoye
    IEICE Technical Report, 112, 78, 77, 82, Jun. 2012
    Japanese
  • GPU Acceleration of Cycle-based Soft-Error Simulation for Reconfigurable Array Architectures               
    Takashi Imagawa, Takahiro Oue, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    Proc. of the 17th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI2012), 88, 93, Mar. 2012, [Peer-reviewed]
    English, International conference proceedings
  • Hardware Architecture for Accelerating Monte Carlo based SSTA using Generalized STA Processing Element               
    Hiroshi Yuasa, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    Proc. of the 17th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI2012), 205, 210, Mar. 2012, [Peer-reviewed]
    English, International conference proceedings
  • Acceleration Scheme for Monte Carlo based SSTA using Generalized STA Processing Element               
    Hiroshi Yuasa, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    Proc. of ACM/IEEE International Workshop on Timing Issues (TAU), Jan. 2012, [Peer-reviewed]
    English, International conference proceedings
  • A High-Throughput Pipelined Parallel Architecture for JPEG XR Encoding
    Hiroshi Tsutsui, Koichi Hattori, Hiroyuki Ochi, Yukihiro Nakamura
    ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS, 11, 4, 1, 25, 2012, [Peer-reviewed]
    English, Scientific journal
  • Halo Artifacts Reduction Method for Variational based Realtime Retinex Image Enhancement
    Hiroshi Tsutsui, Satoshi Yoshikawa, Hiroyuki Okuhata, Takao Onoye
    2012 ASIA-PACIFIC SIGNAL AND INFORMATION PROCESSING ASSOCIATION ANNUAL SUMMIT AND CONFERENCE (APSIPA ASC), 2012, [Peer-reviewed]
    English, International conference proceedings
  • Statistical Observations of NBTI-induced Threshold Voltage Shifts on Small Channel-area Devices
    Takashi Sato, Hiromitsu Awano, Hirofumi Shimizu, Hiroshi Tsutsui, Hiroyuki Ochi
    2012 13TH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED), 306, 311, 2012, [Peer-reviewed]
    English, International conference proceedings
  • An Acceleration Method for Power Grid Analysis using Block-Iterative Algorithm
    Takumi Morishita, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    IEICE Technical Report, 111, 324, 67, 71, Nov. 2011
    Japanese
  • A study on parameter estimation for modeling of random-telegraph noise
    Hiromitsu Awano, Hirofumi Shimizu, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    IEICE Technical Report, 111, 324, 85, 90, Nov. 2011
    Japanese
  • Random-walk based transient analysis for linear circuits using quasi-zero-variance importance sampling
    Tetsuro Miyakawa, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    IEICE Technical Report, 111, 324, 73, 78, Nov. 2011
    Japanese
  • An automated estimation of MOS transistors' interface-state numbers using EM algorithm
    Hirofumi Shimizu, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    IEICE Society Conference, 2011, 93, Sep. 2011
    Japanese
  • A sensor-based self-adjustment approach for controlling I/O buffer impedance
    Zhi Li, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    Proc. of IEICE Society Conference, 120, 120, 120, The Institute of Electronics, Information and Communication Engineers, Sep. 2011
    English
  • A GPU Implementation of Jacobi Method for Power Grid Analysis
    Takumi Morishita, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    IEICE Society Conference, 2011, 84, Sep. 2011
    Japanese
  • A device array for efficient bias-temperature instability measurements
    Takashi Sato, Tadamichi Kozaki, Takumi Uezono, Hiroshi Tsutsui, Hiroyuki Ochi
    European Solid-State Device Research Conference, 143, 146, Sep. 2011, [Peer-reviewed]
    English, International conference proceedings
  • Sequential Importance Sampling for Yield Estimation of Circuits with Multiple Failure Regions
    Kentaro Katayama, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    in Proc. of IPSJ DA Symposium, 2011, 5, 93, 98, Aug. 2011, [Peer-reviewed]
    Japanese, International conference proceedings
  • An Optimization Method of Selective TMR for Coarse- Grained Reconfigurable Architecutres using Reliability Model of Routing Resources
    Takashi Imagawa, Hiroshi Yuasa, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    in Proc. of IPSJ DA Symposium, 2011, 5, 111, 116, Aug. 2011, [Peer-reviewed]
    Japanese, International conference proceedings
  • Quality evaluation of an inpainting-based deinterlacing scheme
    Tatsuo Maeno, Hiroshi Tsutsui, Takao Onoye
    IEICE Technical Report, 111, 78, 99, 104, Jun. 2011
    Japanese
  • An approach to halo suppression for Retinex-based image enhancement
    Satoshi Yoshikawa, Hiroshi Tsutsui, Hiroyuki Okuhata, Takao Onoye
    IEICE Technical Report, 111, 78, 93, 98, The Institute of Electronics, Information and Communication Engineers, Jun. 2011
    Japanese, In Retinex-based image enhancement schemes, an image is enhanced by removing an estimated illumination included in the input image. As for illumination estimation method, in this paper, we focus on the variational model which utilizes spatially smooth property of the illumination and formulates the illumination estimation problem as a quadratic programming optimization problem. In this method, the ordinary halo effect, which over-enhances bright regions adjacent with dark regions, does not occur. However, dark regions adjacent with bright regions remain as it was since they cannot be sufficiently enhanced. This effect is called a reverse halo effect in this paper. To suppress this effect, we propose a method to control the parameter in the cost function based on each pixel value and the amount of edge component. The experimental results show that the proposed method can suppress the reverse halo effect maintaining other features of the Retinex-based image enhancement.
  • A stress-parallelized device array for efficient bias-temperature stability measurement               
    Takashi Sato, Tadamichi Kozaki, Takumi Uezono, Hiroshi Tsutsui, Hiroyuki Ochi
    Proc. of IEEE International Workshop on Design for Manufacturability and Yield 2011 (DFM&Y), 19, 22, Jun. 2011, [Peer-reviewed]
    English, International conference proceedings
  • Acceleration of random-walk-based linear circuit analysis using importance sampling
    Tetsuro Miyakawa, Koh Yamanaga, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    Proceedings of the ACM Great Lakes Symposium on VLSI, GLSVLSI, 211, 216, May 2011, [Peer-reviewed]
    English, International conference proceedings
  • Hardware Implementation of Real-time Motion Adaptive Deinterlacing based on Inpainting               
    Tatsuo Maeno, Hiroshi Tsutsui, Takao Onoye
    Proceedings of International Conference on Embedded Systems and Intelligent Technology (ICESIT), Feb. 2011, [Peer-reviewed]
    English, International conference proceedings
  • A Design Strategy for Sub-Threshold Circuits Considering Energy-Minimization and Yield-Maximization
    Junya Kawashima, Hiroyuki Ochi, Hiroshi Tsutsui, Takashi Sato
    2011 IEEE INTERNATIONAL SOC CONFERENCE (SOCC), 57, 62, 2011, [Peer-reviewed]
    English, International conference proceedings
  • A Design Strategy for Sub-Threshold Circuits Considering Energy-Minimization and Yield-Maximization
    Junya Kawashima, Hiroyuki Ochi, Hiroshi Tsutsui, Takashi Sato
    2011 IEEE INTERNATIONAL SOC CONFERENCE (SOCC), 57, 62, 2011, [Peer-reviewed]
    English, International conference proceedings
  • A fully pipelined implementation of Monte Carlo based SSTA on FPGAs
    Hiroshi Yuasa, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    2011 12TH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED), 785, 790, 2011, [Peer-reviewed]
    English, International conference proceedings
  • Sequential Importance Sampling for Low-Probability and High-Dimensional SRAM Yield Analysis
    Kentaro Katayama, Shiho Hagiwara, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
    2010 IEEE AND ACM INTERNATIONAL CONFERENCE ON COMPUTER-AIDED DESIGN (ICCAD), 703, 708, Nov. 2010, [Peer-reviewed]
    English, International conference proceedings
  • An Approach to Motion-Compensated Frame Interpolation based on Feature Tracking               
    Hideyuki Nakamura, Hiroshi Tsutsui, Takao Onoye
    Proceedings of International Workshop on Smart Info-Media Systems in Asia (SISA), Sep. 2010, [Peer-reviewed]
    English, International conference proceedings
  • An FPGA Implementation of Real-Time Retinex Video Image Enhancement
    Hiroshi Tsutsui, Hideyuki Nakamura, Ryoji Hashimoto, Hiroyuki Okuhata, Takao Onoye
    Proc. of World Automation Congress (WAC), International Forum on Multimedia and Image Processing (IFMIP), Sep. 2010, [Peer-reviewed]
    English, International conference proceedings
  • Noise Analysis of Video Sequences Acquired by Consumer Camcorders
    Satoshi Yoshikawa, Hiroshi Tsutsui, Takao Onoye
    IEICE Technical Report, 110, 74, 93, 98, Jun. 2010
    Japanese
  • Hardware Implementation of Real-time Deinterlacing based on Inpainting
    Tatsuo Maeno, Hiroshi Tsutsui, Takao Onoye
    IEICE Technical Report, 110, 74, 87, 92, Jun. 2010
    Japanese
  • Media Streaming System with Dynamic Rate Control for High Speed Mobile Networks               
    Masayuki Hiromoto, Hiroshi Tsutsui, Hiroyuki Ochi, Tomoyuki Osano, Norihiro Ishikawa, Yukihiro Nakamura
    IPSJ Journal, 50, 10, 2532, 2542, Oct. 2009, [Peer-reviewed]
    Japanese, Scientific journal
  • Motion-Compensated Frame Interpolation based on Feature Tracking
    Hideyuki Nakamura, Hiroshi Tsutsui, Ryoji Hashimoto, Takao Onoye
    IEICE Society Conference, 2009, 204, 204, The Institute of Electronics, Information and Communication Engineers, Sep. 2009
    Japanese
  • Efficient Memory Organization Framework for JPEG2000 Entropy Codec
    Hiroki Sugano, Takahiko Masuzaki, Hiroshi Tsutsui, Takao Onoye, Hiroyuki Ochi, Yukihiro Nakamura
    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, E92A, 8, 1970, 1977, Aug. 2009, [Peer-reviewed]
    English, Scientific journal
  • A JPEG2000 Codec System Architecture for Single Tile Processing
    Takahiko Masuzaki, Hiroshi Tsutsui, Takao Onoye, Yusuke Mizuno, Gen Sasaki, Yukihiro Nakamura
    Journal of the Institute of Image Electronics Engineers of Japan, 38, 3, 296, 304, May 2009, [Peer-reviewed]
    English, Scientific journal
  • Dynamic rate control for media streaming in high-speed mobile networks
    Masayuki Hiromoto, Hiroshi Tsutsui, Hiroyuki Ochi, Tomoyuki Osano, Norihiro Ishikawa, Yukihiro Nakamura
    IEEE Wireless Communications and Networking Conference, WCNC, Apr. 2009, [Peer-reviewed]
    English, International conference proceedings
  • Likelihood Estimation for Transform Domain Distributed Video Coding
    Ryoji Hashimoto, Hiroshi Tsutsui, Takao Onoye, Tomohiro Ikai
    IEICE Technical Report, 108, 425, 31, 36, The Institute of Image Information and Television Engineers, Feb. 2009
    Japanese, Distributed Video Coding (DVC), which is a new image compression paradigm, attracts a lot of attention from video researchers. While computational cost of DVC encoding is lower than that of MPEG-2, low coding efficiency has been an issue for practical DVC applications. In this paper, a likelihood estimation method for transform domain DVC is proposed, which uses Cauchy distribution as a virtual channel model. In the decoder, virtual channel is estimated by utilizing error between forward and backward predicted images for each frequency component. Likelihood is obtained from estimated virtual channel. Simulation results show that the proposed method can estimate the error rate with 1.6% error on average.
  • A High-Throughput Pipelined Architecture for JPEG XR Encoding
    Koichi Hattori, Hiroshi Tsutsui, Hiroyuki Ochi, Yukihiro Nakamura
    2009 IEEE/ACM/IFIP 7TH WORKSHOP ON EMBEDDED SYSTEMS FOR REAL-TIME MULTIMEDIA, 9, +, 2009, [Peer-reviewed]
    English, International conference proceedings
  • Dynamic Rate Control for Media Streaming in High-speed Mobile Network               
    Masayuki Hiromoto, Hiroshi Tsutsui, Hiroyuki Ochi, Tomoyuki Osano, Norihiro Ishikawa, Yukihiro Nakamura
    in Proc. of Multimedia, Distributed, Cooperative and Mobile Symposium 2008, 1167, 1176, Jul. 2008, [Peer-reviewed]
    Japanese, International conference proceedings
  • An Architecture of Photo Core Transform in HD Photo Coding System for Embedded System of Various Bandwidths
    Koichi Hattori, Hiroshi Tsutsui, Hiroyuki Ochi, Yukihiro Nakamura
    IEICE Technical Report, 108, 85, 39, 44, Jun. 2008
    Japanese
  • An Architecture of Photo Core Transform in HD Photo Coding System for Embedded Systems of Various Bandwidths
    Koichi Hattori, Hiroshi Tsutsui, Hiroyuki Ochi, Yukihiro Nakamura
    2008 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS (APCCAS 2008), VOLS 1-4, 1592, +, 2008, [Peer-reviewed]
    English, International conference proceedings
  • Video Coding Scheme for Video Sequences Degraded by Noise of Old Motion Picture Films
    Hiroshi Tsutsui
    IEICE Society Conference, 2007, SS.8, SS.9, Sep. 2007
    Japanese
  • A Multi-Symbol Arithmetic Decoder for JPEG2000
    Hiroshi Tsutsui, Norimasa Fujita, Takao Onoye, Yukihiro Nakamura
    IEICE Technical Report, 107, 93, 13, 18, The Institute of Electronics, Information and Communication Engineers, Jun. 2007
    Japanese, In this paper, we propose a novel multi-symbol arithmetic decoder for JPEG2000, which is the most cost-intensive part in JPEG2000 decoding. The experimental result shows that by using the proposed arithmetic decoders which decode two and three symbols per cycle, the time required by arithmetic decoding with a single-symbol decoder can be reduced to 83% and 78% respectively.
  • Highly Accurate Stereo Matching Processor based on Variable Window Approach
    Ryusuke Miyamoto, Jaehoon Yu, Hiroshi Tsutsui, Yukihiro Nakamura
    Journal of the Institute of Image Electronics Engineers of Japan, 36, 3, 210, 218, May 2007, [Peer-reviewed]
    English, Scientific journal
  • Stochastic pedestrian tracking based on 6-stick skeleton model
    Ryusuke Miyamoto, Jumpei Ashida, Hiroshi Tsutsui, Yukihiro Nakamura
    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, E90A, 3, 606, 617, Mar. 2007, [Peer-reviewed]
    English, Scientific journal
  • Home appliance control from mobile phones
    Hiromitsu Sumino, Yoshitaka Uchida, Norihiro Ishikawa, Hiroshi Tsutsui, Hiroyuki Ochi, Yukihiro Nakamura
    2007 4TH IEEE CONSUMER COMMUNICATIONS AND NETWORKING CONFERENCE, VOLS 1-3, 793, +, 2007, [Peer-reviewed]
    English, International conference proceedings
  • Implementation of AV streaming system using peer-to-peer communication
    Hiroshi Tsutsui, Jaehoon Yu, Tomonori Izumi, Hiroyuki Ochi, Yukihiro Nakamura, Takaaki Komura, Yoshitaka Uchida, Norihiro Ishikawa
    2007 4TH IEEE CONSUMER COMMUNICATIONS AND NETWORKING CONFERENCE, VOLS 1-3, 778, +, 2007, [Peer-reviewed]
    English, International conference proceedings
  • Boosting based Pedestrian Detection in Far Infrared Images
    Ryusuke Miyamoto, Hiroki Sugano, Hiroaki Saito, Hiroshi Tsutsui, Hiroyuki Ochi, Ken'ichi Hatanaka, Yukihiro Nakamura
    IEICE Society Conference, 2006, 178, Sep. 2006
    Japanese
  • A Retargetable Compiler for Cell-Array Based Self-Reconfigurable Architecture               
    Masayuki Hiromoto, Sinichi Koyama, Kentaro Nakahara, Hiroshi Tsutsui, Hiroyuki Ochi, Yukihiro Nakamura
    in Proc. of IPSJ DA Symposium, 181, 186, Jul. 2006, [Peer-reviewed]
    Japanese, International conference proceedings
  • A JPEG Coding Scheme for High Fidelity Images by Halftoning Less Significant Extra Bits               
    Fumihiko Hyuga, Takahiko Masuzaki, Hiroshi Tsutsui, Takao Onoye, Yukihiro Nakamura
    Proc. of International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC2006), 3, 97, 100, Jul. 2006, [Peer-reviewed]
    English, International conference proceedings
  • A JPEG Coding Scheme for High Fidelity Images by Halftoning Less Significant Extra Bits and an Examination of Optimizing the Halftone
    Fumihiko Hyuga, Takahiko Masuzaki, Hiroshi Tsutsui, Takao Onoye, Yukihiro Nakamura
    IEICE Technical Report, 106, 96, 31, 36, The Institute of Electronics, Information and Communication Engineers, Jun. 2006
    Japanese, In this paper, a novel JPEG coding scheme for high fidelity images is proposed. When high fidelity images are compressed with JPEG, the information which cannot be represented by JPEG-compliant 8-bit data must be truncated. This truncation causes the quality degradation, In order to suppress this quality degradation, in the proposed scheme, halftoning is used to represent pixels of a high fidelity image with JPEG-compliant 8-bit data. The effect of halftoning depends on the characteristics of image. So halftoning and rounding is applied for each of 8×8 size block to truncate the extra information, then the method which is applied for each block is decided by the quality criteria. Moreover, optimization of halftoning parameters using simulated annealing is demonstrated.
  • Stochastic Pedestrian Tracking based on Skeleton Model with Likelihood Estimation using Distance Transformed Images
    Ryusuke Miyamoto, Jumpei Ashida, Hiroshi Tsutsui, Yukihiro Nakamura
    IEICE Technical Report, 106, 96, 25, 30, The Institute of Electronics, Information and Communication Engineers, Jun. 2006
    Japanese, A novel pedestrian tracking scheme based on a particle filter is proposed, which uses a skeleton model of a pedestrian and distance transformed images for likelihood estimation. The six-stick skeleton model used in the proposed approach is very distinctive in representing a pedestrian simply but effectively, with which the efficient state space for the pedestrian tracking can be derived. Experimental results by using PETS sample sequences demonstrate that the proposed approach achieves high-accurate pedestrian tracking without any of prior learning.
  • A Retargetable Compiler for Cell-Array Based Self-Reconfigurable Architecture
    Masayuki Hiromoto, Sinichi Koyama, Kentaro Nakahara, Hiroshi Tsutsui, Hiroyuki Ochi, Yukihiro Nakamura
    IEICE Technical Report, 106, 49, 7, 12, May 2006
    Japanese
  • 多重画像の統合による動きブレを伴わないカラーダイナミックレンジの拡張
    Ryusuke Miyamoto, Yuuki Hara, Hiroshi Tsutsui, Yukihiro Nakamura
    in Proc. of Workshop on Circuits and Systems in Karuizawa, 19, 189, 192, [電子情報通信学会], Apr. 2006, [Peer-reviewed]
    Japanese, International conference proceedings
  • 可変ウィンドウステレオマッチングプロセッサのアーキテクチャ               
    Ryusuke Miyamoto, Jaehoon Yu, Hiroshi Tsutsui, Yukihiro Nakamura
    in Proc. of Workshop on Circuits and Systems in Karuizawa, 165, 170, Apr. 2006, [Peer-reviewed]
    Japanese, International conference proceedings
  • Efficient memory architecture for JPEG2000 entropy codec               
    Hiroki Sugano, Hiroshi Tsutsui, Takahiko Masuzaki, Takao Onoye, Hiroyuki Ochi, Yukihiro Nakamura
    Proceedings - IEEE International Symposium on Circuits and Systems, 2881, 2884, 2006
    English, International conference proceedings
  • Design framework for JPEG2000 system architecture
    Hiroshi Tsutsui, Takahiko Masuzaki, Yoshiteru Hayashi, Yoshitaka Taki, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura
    INTELLIGENT AUTOMATION AND SOFT COMPUTING, 12, 3, 331, 343, 2006, [Peer-reviewed]
    English, Scientific journal
  • Efficient memory architecture for JPEG2000 entropy codec
    Hiroki Sugano, Hiroshi Tsutsui, Takahiko Masuzaki, Takao Onoye, Hiroyuki Ochi, Yukihiro Nakamura
    2006 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-11, PROCEEDINGS, 2881, 2884, 2006, [Peer-reviewed]
    English, International conference proceedings
  • Pedestrian recognition in far-infrared images by combining boosting-based detection and skeleton-based stochastic tracking
    Ryusuke Miyamoto, Hiroki Sugano, Hiroaki Saito, Hiroshi Tsutsui, Hiroyuki Ochi, Ken'ichi Hatanaka, Yukihiro Nakamura
    ADVANCES IN IMAGE AND VIDEO TECHNOLOGY, PROCEEDINGS, 4319, 483, +, 2006, [Peer-reviewed]
    English, International conference proceedings
  • Skeleton based stochastic pedestrian tracking for surveillance
    Ryusuke Miyamoto, Jumpei Ashida, Hiroshi Tsutsui, Yukihiro Nakamura
    WMSCI 2006: 10TH WORLD MULTI-CONFERENCE ON SYSTEMICS, CYBERNETICS AND INFORMATICS, VOL V, PROCEEDINGS, V, 206, +, 2006, [Peer-reviewed]
    English, International conference proceedings
  • Probabilistic pedestrian tracking based on a skeleton model
    Jumpei Ashida, Ryusuke Miyamoto, Hiroshi Tsutsui, Takao Onoye, Yukihiro Nakamura
    2006 IEEE INTERNATIONAL CONFERENCE ON IMAGE PROCESSING, ICIP 2006, PROCEEDINGS, 2825, +, 2006, [Peer-reviewed]
    English, International conference proceedings
  • High-Quality Motion JPEG2000 Rate Control Scheme Based on Scene Changes
    Ryusuke Miyamoto, Hiroshi Tsutsui, Hiroaki Sugita, Takahiko Masuzaki, Hiroyuki Ochi, Takao Onoye, Yukihiro Nakamura
    IEICE Society Conference, 2005, 164, Sep. 2005
    Japanese
  • Efficient SRAM Architecture for JPEG2000 Entropy Coder
    Hiroshi Tsutsui, Hiroki Sugano, Takahiko Masuzaki, Hiroyuki Ochi, Takao Onoye, Yukihiro Nakamura
    IEICE Society Conference, 2005, 22, Sep. 2005
    Japanese
  • JPEG2000 符復号器のためのスケーラブルデザインフレームワーク               
    Hiroshi Tsutsui, Takahiko Masuzaki, Takao Onoye, Yukihiro Nakamura
    VDEC LSI デザイナーフォーラム, Aug. 2005
    Japanese
  • High quality motion JPEG2000 coding scheme based on the human visual system
    R Miyamoto, H Sugita, Y Hayashi, H Tsutsui, T Masuzaki, T Onoye, Y Nakamura
    2005 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), VOLS 1-6, CONFERENCE PROCEEDINGS, 2096, 2099, 2005, [Peer-reviewed]
    English, International conference proceedings
  • Video quality enhancement for Motion JPEG2000 encoding based on the human visual system               
    Ryusuke Miyamoto, Yoshiteru Hayashi, Hiroshi Tsutsui, Takahiko Masuzaki, Takao Onoye, Yukihiro Nakamura
    Proc. of 2004 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS2004), 1161, 1164, Dec. 2004, [Peer-reviewed]
    English, International conference proceedings
  • 視覚特性を用いた Motion JPEG2000 レート制御手法               
    Hiroshi Tsutsui, Yoshiteru Hayashi, Ryusuke Miyamoto, Takahiko Masuzaki, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura
    第6回 YRP移動体通信産学官交流シンポジウム, 152, 153, Jul. 2004
    Japanese
  • A scalable approach for estimation of focus of expansion
    J Ashida, R Miyamoto, H Tsutsui, T Onoye, Y Nakamura
    Proceedings of the Fourth IASTED International Conference on Visualization, Imaging, and Image Processing, 6, 11, 2004, [Peer-reviewed]
    English, International conference proceedings
  • Embedded system implementation of scalable and object-based video coding
    T Onoye, H Tsutsui, G Fujita, Y Nakamura, Shirakawa, I
    Image Processing, Biomedicine, Multimedia, Financial Engineering and Manufacturing, Vol 18, 18, 243, 250, 2004, [Peer-reviewed]
    English, International conference proceedings
  • Scalable design framework for JPEG2000 system architecture
    H Tsutsui, T Masuzaki, Y Hayashi, Y Taki, T Izumi, T Onoye, Y Nakamura
    ADVANCES IN COMPUTER SYSTEMS ARCHITECTURE, PROCEEDINGS, 3189, 296, 308, 2004, [Peer-reviewed]
    English, Scientific journal
  • JPEG2000 high-speed progressive decoding scheme
    H Sugita, VQ Minh, T Masuzaki, H Tsutsui, T Izumi, T Onoye, Y Nakamura
    2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 3, PROCEEDINGS, 3, 873, 876, 2004, [Peer-reviewed]
    English, International conference proceedings
  • High-Level Synthesis Design System for VLSI Processors in the 21st Century               
    Yukihiro Nakamura, Hiroshi Tsutsui
    ASEAN Microelectronics 2003, AUN/SEED-Net Field-wise Seminar, Aug. 2003
    English
  • 高度通信情報システムのためのアーキテクチャと設計技術               
    Yukihiro Nakamura, Tomonori Izumi, Hiroshi Tsutsui
    第5回 YRP移動体通信産学官交流シンポジウム, Jul. 2003
    Japanese
  • Scalable Design Framework for JPEG2000 Encoder Architecture               
    Yoshiteru Hayashi, Hiroshi Tsutsui, Takahiko Masuzaki, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura
    Proc. of the 11th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI2003), 372, 377, Apr. 2003, [Peer-reviewed]
    English, International conference proceedings
  • Design framework for JPEG2000 encoding system architecture
    Y Hayashi, H Tsutsui, T Masuzaki, T Izumi, T Onoye, Y Nakamura
    PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL II, 2, 740, 743, 2003, [Peer-reviewed]
    English, International conference proceedings
  • A Design of JPEG2000 Encoder by Configurable Processor
    Hiroshi Tsutsui, Takahiko Masuzaki, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura
    Proceedings of the Society Conference of IEICE, 2002, 89, 89, The Institute of Electronics, Information and Communication Engineers, Sep. 2002
    Japanese
  • JPEG2000 Fully Scalable Image Encoder by Configurable Processor               
    Hiroshi Tsutsui, Takahiko Masuzaki, Masayuki Oyamatsu, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura
    Proc. of Euromedia Conference, 168, 172, Apr. 2002, [Peer-reviewed]
    English, International conference proceedings
  • Adaptive rate control scheme for JPEG2000 image coding
    Takahiko Masuzaki, Hiroshi Tsutsui, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura
    IEICE General Conference, 2002, 121, 121, The Institute of Electronics, Information and Communication Engineers, Mar. 2002
    Japanese
  • High speed JPEG2000 encoder by configurable processor
    H Tsutsui, T Masuzaki, T Izumi, T Onoye, Y Nakamura
    APCCAS 2002: ASIA-PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS, VOL 1, PROCEEDINGS, 1, 45, 50, 2002, [Peer-reviewed]
    English, International conference proceedings
  • Adaptive rate control for JPEG2000 image coding in embedded systems
    T Masuzaki, H Tsutsui, T Izumi, T Onoye, Y Nakamura
    2002 INTERNATIONAL CONFERENCE ON IMAGE PROCESSING, VOL III, PROCEEDINGS, 3, 77, 80, 2002, [Peer-reviewed]
    English, International conference proceedings
  • JPEG2000 adaptive rate control for embedded systems
    T Masuzaki, H Tsutsui, T Izumi, T Onoye, Y Nakamura
    2002 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL IV, PROCEEDINGS, 4, 333, 336, 2002, [Peer-reviewed]
    English, International conference proceedings
  • LUT-array-based PLD and synthesis approach based on sum of generalized complex terms expression
    H Tsutsui, A Tomita, S Sugimoto, K Sakai, T Izumi, T Onoye, Y Nakamura
    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, E84A, 11, 2681, 2689, Nov. 2001, [Peer-reviewed]
    English, Scientific journal
  • Architecture of JPEG2000 encoder for fully scalable image coding
    Hiroshi Tsutsui, Takahiko Masuzaki, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura
    IEICE Society Conference, 2001, 115, Sep. 2001
    Japanese
  • Design of JPEG2000 Encoder for Fully Scalable Image Coding               
    Hiroshi Tsutsui, Takahiko Masuzaki, Masayuki Oyamatsu, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura
    Proc. of World Multi-Conference on Systemics, Cybernetics and Informatics (SCI2001), XV, 546, 551, Jul. 2001, [Peer-reviewed]
    English, International conference proceedings
  • Architecture of JPEG2000 encoder for scalable coding
    Takahiko Masuzaki, Hiroshi Tsutsui, Masayuki Oyamatsu, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura
    Technical report of IEICE. DSP, 101, 141(CAS2001 1-28), 63, 70, The Institute of Electronics, Information and Communication Engineers, Jun. 2001
    Japanese, This paper describes an architecture of JPEG2000 encoder for fully scalable image coding. To exploit different aspects of scalability inherent in JPEG2000, a set of novel mechanisms for pass termination, layering, and tilepart organization is devised. In addition, the proposed JPEG2000 encoder is implemented through the use of Xtensa configurable processor and optimized by user defined specific instructions. As a result, the number of processor cycles for encoding is reduced approximately by 40 %.
  • 16bit Free CPU の設計               
    Hiroshi Tsutsui, Takahiko Masuzaki
    in Proc. of the 18th PARTHENON Workshop, May 2001
    Japanese
  • A design of LUT-array-based PLD and a synthesis approach based on sum of generalized complex terms expression
    Hiroshi Tsutsui, Kazuhiro Hiwada, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura
    Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS), 5, 203, 206, May 2001, [Peer-reviewed]
    English, International conference proceedings
  • LUTアレイ型PLDの設計と試作
    Akihiko Tomita, Shigenori Sugimoto, Hiroshi Tsutsui, Kazuhisa Sakai, Tomonori Izumi, Yukihiro Nakamura
    システムLSI琵琶湖ワークショップ, 243, 246, Nov. 2000
    Japanese
  • LUTアレイ型PLDの設計と試作               
    Shigenori Sugimoto, Akihiko Tomita, Hiroshi Tsutsui, Kazuhisa Sakai, Kazuhiro Hiwada, Yukihiro Nakamura
    VDEC LSI デザイナーフォーラム, 85, Sep. 2000
    Japanese
  • A Physical Design of Reconfigurable LUT Array, and a Synthesis Approach based on Sum of Generalized Complex Terms Expression
    Hiroshi Tsutsui, Kazuhiro Hiwada, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura
    in Proc. of IPSJ DA Symposium, 2000, 8, 21, 26, Jul. 2000, [Peer-reviewed]
    Japanese, International conference proceedings
  • PCAデバイスの設計と試作               
    Shigenori Sugimoto, Akihiko Tomita, Hiroshi Tsutsui, Kazuhisa Sakai, Kazuhiro Hiwada, Yukihiro Nakamura
    in Proc. of the 16th PARTHENON Workshop, 31, 42, May 2000
    Japanese
  • 16bit Free CPU の設計               
    Ryusuke Miyamoto, Hiroshi Tsutsui, Ryuta Nakanishi
    in Proc. of the 16th PARTHENON Workshop, May 2000
    Japanese

Other Activities and Achievements

  • Foreword.
    Shingo Yoshizawa, Hiroshi Tsutsui, IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 106, 3, 454, 455, Mar. 2023
  • An Evaluation of Energy Consumption Under Different Spreading Factors for LoRa Modulation               
    Takuya Yasugi, Hiroshi Tsutsui, Takeo Ohgane, Joint Conference of Electrical, Electronics and Information Engineers in Hokkaido, 151, 152, Sep. 2021
    Japanese, Summary national conference
  • Promoting Wagyu Beef Traceability Between Australia and Japan Using Blockchain and IoT Technologies               
    Hiroshi Tsutsui, Ying He, Takeo Ohgane, The Summaries of Research Announcements, FOOMA JAPAN 2021 Academic Plaza, 28, 88, 91, Jun. 2021, [Lead author], [Internationally co-authored]
    Japanese
  • An Evaluation of Lightweight Image Compression Using Line-By-Line Adaptive Processing with Golomb Coding               
    大塚 祐大, 片岸 由奈子, 筒井 弘, Joint Conference of Electrical, Electronics and Information Engineers in Hokkaido, 89, 90, Nov. 2020
    Japanese, Summary national conference
  • An Evaluation of SVM Based Color Detection for Stack Light Indicator Monitoring Systems Using Web Cameras for Automatic Production Lines               
    髙杉 豪, 筒井 弘, 宮永 喜一, IEICE Society Conference, 85, 85, Sep. 2020
    Japanese, Summary national conference
  • An experimental comparison of CNN- and CRNN-CTC for automatic phrase speech recognition systems using a children's speech database
    Yunzhe Wang, Yu Tian, Yoshikazu Miyanaga, Hiroshi Tsutsui, IEICE Technical Report, 120, 51, 49, 54, Jun. 2020
    English, Technical report
  • An Experimental Evaluation of Parking Detection Using Web Cameras in a Parking Area               
    Takuto Fukusaki, Hiroshi Tsutsui, Yoshikazu Miyanaga, IEICE General Conference, 139, 139, Mar. 2020
    Japanese, Summary national conference
  • High-Throughput Scalable Radix-4 FFT Processor Design and Its Area Evaluation               
    Tomotaka Kawabata, Hiroshi Tsutsui, Yoshikazu Miyanaga, IEICE General Conference, 124, 124, Mar. 2020, [Domestic magazines]
    Japanese, Summary national conference
  • Hardware Design of High Efficient Wireless Communication Systems for 5G Mobile Networks               
    Mariko Hirayama, Hiroshi Tsutsui, Yoshikazu Miyanaga, Proceedings of IEICE Hokkaido Section Student Council Internet Symposium, Feb. 2020
    Japanese, Summary national conference
  • 雑音にロバストな音声認識システムのためのランニングスペクトル分析を用いた自動音声区間検出
    中越達也, 早坂昇, 筒井弘, 宮永喜一, 電子情報通信学会大会講演論文集(CD-ROM), 2019, ROMBUNNO.A‐15‐2, 05 Mar. 2019
    Japanese
  • 製造ラインにおける状態報告ランプのWebカメラを用いた色判定システムの実験的評価
    山田健太郎, 筒井弘, 須藤彰紘, 宮永喜一, 電子情報通信学会大会講演論文集(CD-ROM), 2019, ROMBUNNO.A‐15‐10, 05 Mar. 2019
    Japanese
  • Development of Real-time FHD Loss-Less Video Communication over an 8\times 8 MIMO-OFDM System
    Yoshikazu Miyanaga, Junji Yamano, Masaki Miura, Tohru Gotoh, Takashi Imagawa, Hiroshi Tsutsui, 2018 Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, APSIPA ASC 2018 - Proceedings, 1087, 1090, 04 Mar. 2019
    IEEE
  • A Study of Low Energy Video Encoding Method for Raspberry Pi
    福元敦己, 今川隆司, 筒井弘, 宮永喜一, 越智裕之, 電子情報通信学会技術研究報告, 118, 473(SIS2018 37-52), 5‐9, 27 Feb. 2019
    Japanese
  • A Study of Global Motion Compensation for Frame Interpolation with High‐Resolution and High‐Frame Rate Video
    浮橋慶太, 今川隆司, 筒井弘, 宮永喜一, 越智裕之, 電子情報通信学会技術研究報告, 118, 473(SIS2018 37-52), 53‐58, 27 Feb. 2019
    Japanese
  • An Evaluation of Offline Video Analysis Acceleration for Surveillance Cameras Utilizing Multi-core Processors with Frame-level Parallelization               
    福﨑 卓人, 筒井 弘, 宮永 喜一, Proceedings of IEICE Hokkaido Section Student Council Internet Symposium, Feb. 2019
    Japanese, Summary national conference
  • Accuracy on Children's Speech Recognition under Noisy Circumstances
    Yu Tian, Jiayue Tang, Xiaonan Jiang, Hiroshi Tsutsui, Yoshikazu Miyanaga, ISCIT 2018 - 18th International Symposium on Communication and Information Technology, 101, 104, 24 Dec. 2018
  • An Accuracy Evaluation of Fingerprint Database Constructed by Mean-Shift Clustering for WiFi Indoor Positioning Systems               
    Myat Hsu Aung, Hiroshi Tsutsui, Yoshikazu Miyanaga, Proceedings of 2018 Winter International Symposium on Big-Data, Cybersecurity and IoT, Dec. 2018, [International Magazine]
    English, Introduction international proceedings
  • WiFi Indoor Positioning System Using Fingerprint Database Constructed by Mean-Shift Clustering with Estimated Reference Locations               
    Myat Hsu Aung, Hiroshi Tsutsui, Yoshikazu Miyanaga, Proceedings of the GSB Student Workshop, The 2nd GI-CoRE GSQ, GSB & IGM Joint Symposium, Aug. 2018, [International Magazine]
    English, Introduction international proceedings
  • A Min‐Sum LDPC Decoder with Variable Parallelism and Its Memory Bank Access Scheduling Method
    渡辺大詩, 筒井弘, 今川隆司, 宮永喜一, 映像情報メディア学会技術報告, 42, 23(BCT2018 60-72), 47‐50, 19 Jul. 2018
    Japanese
  • Rejection criterion for keyword recognition system
    Xiaonan Jiang, Tatsuya Nakagoshi, Jiayue Tang, Riku Takanashi, Yu Tian, Hiroshi Tsutsui, Yoshikazu Miyanaga, IEICE Technical Report, 118, 149, 53, 58, Jul. 2018
    English, Technical report
  • MMSE Based Low Complexity Maximum Likelihood Detection Using Successive Interference Canceller for MIMO‐OFDM Hardware Implementation
    池下貴大, 渡辺大詩, 筒井弘, 宮永喜一, 映像情報メディア学会技術報告, 42, 11(BCT2018 38-49), 25‐28, 02 Mar. 2018
    Japanese
  • A Study on Quality Improvement of Frame Interpolation Method with High‐Resolution and High‐Frame Rate Video Using Foreground Elimination and Contour Extraction
    井原大文, 今川隆司, 上坂浩貴, 鴻上慎吾, 筒井弘, 宮永喜一, 越智裕之, 電子情報通信学会技術研究報告, 117, 455(VLD2017 89-128), 55‐60, 21 Feb. 2018
    Japanese
  • FHD loss-less video communication over 8 × 8 MIMO-OFDM
    Yoshikazu Miyanaga, Hiroshi Tsutsui, Takashi Imagawa, 2017 17th International Symposium on Communications and Information Technologies, ISCIT 2017, 2018-January, 1, 5, 16 Jan. 2018
    IEEE
  • 並列化を用いたLDPC Min‐Sum復号器の高スループットハードウェア設計
    渡辺大詩, 池下貴大, 筒井弘, 今川隆司, 宮永喜一, 電気・情報関係学会北海道支部連合大会講演論文集(CD-ROM), 2017, ROMBUNNO.71, 28 Oct. 2017
    Japanese
  • Foreword.
    Hiroshi Tsutsui, Mitsuji Muneyasu, IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, 100-A, 11, 2219, 2220, 2017
  • チップ試作による最小動作電圧予測手法の評価               
    川島 潤也, 筒井 弘, 越智 裕之, 佐藤 高史, 電子情報通信学会ICD研究会, ICD2012-87, 3, 8, Dec. 2012
    Japanese
  • Accurate I/O Buffer Impedance Self-adjustment using Threshold Voltage and Temperature Sensors
    Zhi Li, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato, 研究報告システムLSI設計技術(SLDM), 2012, 21, 1, 6, 19 Nov. 2012
    With the increased operating frequency and the reduction of feature size, achieving low error-rate data transmission between LSIs is an important field of research. In particular, input/output (I/O) impedance matching, as one of the necessary technologies for high-speed transmission, is strongly required. In this paper, we propose an architecture of output buffer whose impedance is self-adjustable against process variation and temperature characteristic of MOS transistors. The proposed architecture utilizes on-chip sensor circuits to capture threshold voltages and temperatures. Based on a commercial 65nm CMOS technology, the proposed method has been verified. Without the use of reference resistor, it successfully adjusts the I/O impedance within 2.36% and 1.4% around a target of 50Ω through simulation and measurement, respectively, regardless of the process parameters and temperature.With the increased operating frequency and the reduction of feature size, achieving low error-rate data transmission between LSIs is an important field of research. In particular, input/output (I/O) impedance matching, as one of the necessary technologies for high-speed transmission, is strongly required. In this paper, we propose an architecture of output buffer whose impedance is self-adjustable against process variation and temperature characteristic of MOS transistors. The proposed architecture utilizes on-chip sensor circuits to capture threshold voltages and temperatures. Based on a commercial 65nm CMOS technology, the proposed method has been verified. Without the use of reference resistor, it successfully adjusts the I/O impedance within 2.36% and 1.4% around a target of 50Ω through simulation and measurement, respectively, regardless of the process parameters and temperature., English
  • A study on parameter estimation for modeling of random-telegraph noise
    粟野 皓光, 清水 裕史, 筒井 弘, 越智 裕之, 佐藤 高史, 研究報告システムLSI設計技術(SLDM), 2011, 15, 1, 6, 21 Nov. 2011
    ランダムテレグラフノイズ (Random Telegraph Noise: RTN) は微細デバイスの信頼性や回路特性に関わる物理現象であり,様々なモデル化手法が提案されている.閾値電圧の変動'|届と変動時定数は,種々のモデルに共通する特に重要なパラメータであるが,測定データからこれらを求めることは困難な課題となっている.本研究では,キャリアの捕獲と放出の過程を統計的モデルとして表現し,マルコフ連鎖モンテカルロ法 (MCMC) を用いて各パラメータをベイズ推定する手法を提案する.人工的に生成した RTN 信号に提案手法を適用し,良好な結果が得られたが,実測信号については課題も見られた.Random Telegraph Noise (RTN) is a physical phenomenon that is considered to determine reliability and performance of circuits. Time constants of carrier capture and emission, and an associated change of threshold voltage are the important parameters commonly involved in various models, but their extraction from time-domain observations has been a difficult task. In this study, we propose a statistical method for estimating the time constants and the magnitude of threshold voltage shift. Our method is based on a graphical network representation and the parameters are estimated using Markov Chain Monte Carlo (MCMC) method. Experimental application of the proposed method on a synthetic time-domain RTN signal was very successful, while estimation examples on measured RTN signals suggest there is room for further improvement., Japanese
  • A Fast Transient Analysis of Linear Circuit using Quasi Zero Variance Importance Sampling
    宮川 哲朗, 筒井 弘, 越智 裕之, 佐藤 高史, 研究報告システムLSI設計技術(SLDM), 2011, 13, 1, 6, 21 Nov. 2011
    ランダムウオークによる線形回路の過渡解析を高速化する手法を提案する.提案手法では,準ゼロ分散推定法に基づいて逐次的な確率更新を行う際に,一解析時刻前の節点電圧を利用して解析に必要なサンプル数を削減する.また解析中にサンプル数を自動的決定することにより,節点電位の変動による推定の不安定化を防止しつつ高速化を図る.提案手法により,従来のランダムウォーク法に基づく過渡解析に対して 10 倍以上の高速化を実現し,サンプル数自動決定により高速化と解析の安定化の両立を実現した.We propose a method to accelerate random walk based transient analysis of linear circuits. Our method uses quasi-zero-variance estimation with adaptive sample number determination, in which walk probabilities are adaptively updated to reduce estimation variance. The node voltages of previous time step are reused to give initial guesses for alternative probabilities at every time point, which reduces the total number of required samples. An adaptive determination of the number of samples makes estimation very stable and accelerate the analysis even further. The proposed analysis achieves more than 10x speedup against the conventional method., Japanese
  • An Acceleration Method for Power Grid Analysis using Block-Iterative Algorithm
    森下 拓海, 筒井 弘, 越智 裕之, 佐藤 高史, 研究報告システムLSI設計技術(SLDM), 2011, 12, 1, 5, 21 Nov. 2011
    半導体プロセスの微細化が進み,電源回路網の解析が重要になっている.また,電源回路網それ自体の規模も大きく,今後のさらなる巨大化に対応するためにも,回路解析の高速化省メモリ化が大きな課題となっている.ブロック反復法は直接法と反復法を組み合わせた解析方法であり,大規模電源回路網解析への応用が期待されている.本稿ではブロック反復法の高速化を目的として,SOR 法およびブロック分割の観点から収束の加速方法を検討する.Because of its extremely large size, power grid analysis has been a computationally challenging problem both in terms of runtime and memory usage. LU factorization has been widely used to analyze voltage drop simulations due to its stability, but contiguous technology scaling demands even more efficient calculation methods. In this paper, application of block-iterative method, which combines LU factorization and iterative method, is proposed for efficient analysis of power grid analysis. Automatic adjustment of relaxation factor in successive over-relaxation method and block decomposition algorithm are proposed. Evaluation results are also presented., Japanese
  • A Design of LUT-Array-Based PLD
    TOMITA Akihiko, SUGIMOTO Shigenori, TSUTSUI Hiroshi, SAKAI Kazuhisa, HIWADA Kazuhiro, IZUMI Tomonori, ONOYE Takao, NAKAMURA Yukihiro, Technical report of IEICE. VLD, 100, 473, 173, 178, 23 Nov. 2000
    This paper proposes an architecture of LUT-array-based PLD, which is based on an 3-inputs LUT array instead of an AND array that PLA is based on. Utilizing cascaded 3-inputs LUTs, each of which can express an arbitrary Boolean function with three inputs, logic circuits can be mapped effectively to the PLD in compared with ordinary PLAs. In addition, an address decoding mechanism is devised to have an ability to treat a set of LUTs as an LUT with large number of inputs or a memory. Experimental results show that benchmark circuits can be mapped with 14.9% less number of terms to LUT-array-based PLD than that to PLA., The Institute of Electronics, Information and Communication Engineers, Japanese

Lectures, oral presentations, etc.

  • Design Techniques for Wireless Communication and Image Processing IP Cores               
    Hiroshi Tsutsui
    The 1st Hokkaido Young Professionals Workshop, 14 Oct. 2021, Public discourse
    14 Oct. 2021 - 14 Oct. 2021, [Invited]

Courses

  • Media Processing System               
    Hokkaido University
    Apr. 2022 - Present
  • Exercise in Media Network Ⅰ               
    Hokkaido University
    Apr. 2015 - Present
  • Media Network Laboratory ⅡB               
    Oct. 2014 - Present
  • Media Network Laboratory ⅠB               
    Hokkaido University
    Apr. 2014 - Present
  • Exercise in Media Network Ⅱ               
    Hokkaido University
    Apr. 2014 - Present
  • Network Design               
    Hokkaido University
    Apr. 2014 - Present
  • Network Systems               
    Hokkaido University
    Oct. 2013 - Present
  • 電気電子工学実験B               
    京都大学

Affiliated academic society

  • Apr. 2017 - Present
    THE INSTITUTE OF IMAGE INFORMATION AND TELEVISION ENGINEERS               
  • Feb. 2012 - Present
    INFORMATION PROCESSING SOCIETY OF JAPAN               
  • Sep. 2003 - Present
    ACM               
  • Apr. 2001 - Present
    THE INSTITUTE OF ELECTRONICS, INFORMATION AND COMMUNICATION ENGINEERS               
  • 2000 - Present
    IEEE               
  • Dec. 1996 - Present
    THE INSTITUTE OF ELECTRICAL ENGINEERS OF JAPAN               
  • パルテノン研究会               
  • THE INSTITUTE OF IMAGE ELECTRONICS ENGINEERS OF JAPAN               

Research Themes

  • 細分化深層学習による到来方向推定と実測検証
    科学研究費助成事業
    01 Apr. 2023 - 31 Mar. 2027
    大鐘 武雄, 筒井 弘, 西村 寿彦
    各到来波数に対応した特化型DNNの設計を図ることが大きな目標であった.そのため,まず3波到来環境に適したDNNを構築した.さらに,SN比に応じて訓練したSNR特化型DNNで推定すると特性が向上することから,あるSNRと推定波数における特化型DNNの構築を図った.次に,これを用いて,2波到来環境と3波到来環境に対応可能なシステムを構築するため,到来波数を推定するDNNとSNRを推定するDNNとを用意し,これらの推定結果を基に,最適な特化型DNNを選択する手法を採用した.その結果,2波到来環境で約95%以上に,3波到来環境においても約85%の成功率を達成できた.しかし,低SNR環境や,3波到来環境の成功率はまだ不十分であることも明らかとなった.
    低SNR環境での問題は,データに含まれる雑音が無駄な入力となっているということである.そこで,入力データに対して主成分分析を行い,SNRに応じて入力次元を削減することを新たに提案した.その結果,SNR=0dBの環境において,推定成功率を約10%から60%以上に改善することができた.
    3波到来環境においては,推定失敗例を解析した結果,3波が約20度以内の範囲に集中している場合に推定誤りが多く発生していることがわかった.そこで,3波が約20度以内の範囲に集中している場合を想定した近接波特化型DNNを構築し,通常の特化型DNNでの推定結果において3波が約20度以内の範囲に集中している場合には,前記の近接波用DNNを再度適用し直すことを行なった.これにより,推定成功率を約99%に向上することができた.
    実測用USRPに関しては,Lora変調を用いて通信実験を行うことができた.
    日本学術振興会, 基盤研究(B), 北海道大学, 23K26101
  • 細分化深層学習による到来方向推定と実測検証
    科学研究費助成事業
    01 Apr. 2023 - 31 Mar. 2027
    大鐘 武雄, 筒井 弘, 西村 寿彦
    日本学術振興会, 基盤研究(B), 北海道大学, 23H01406
  • Cross-Layer Energy Optimization with Adaptive Control for Ultra-Low Power IoT Sensor Nodes
    Grants-in-Aid for Scientific Research
    01 Apr. 2023 - 31 Mar. 2026
    筒井 弘
    Japan Society for the Promotion of Science, Grant-in-Aid for Scientific Research (C), Hokkaido University, 23K11026
  • 極低消費電力型マルチメディアIoTシステムの研究開発               
    戦略的情報通信研究開発推進事業(SCOPE)先進的電波有効利用型
    Apr. 2020 - Mar. 2021
    筒井 弘
    総務省, 北海道大学, Principal investigator
  • Study on 3D stress-free HMD using electronic holography
    Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (B)
    01 Apr. 2016 - 31 Mar. 2020
    Sakamoto Yuji
    We succeeded in developing head-mounted displays (holo-HMDs) with the world's smallest and lightest electronic holography technology. In addition, we have proposed a method that enables real-time calculation and communication at the current level of hardware technology though researches of high-speed calculation methods and data compression methods. These researches indicate that the holo-HMD can be realized as a system. On the other hand, the deterioration of image quality due to speckles is a remained problem, but we have proposed the suppression method using an algorithm and showed the possibility of suppression. It is necessary to continue to study the measurement of physiological responses.
    Japan Society for the Promotion of Science, Grant-in-Aid for Scientific Research (B), Hokkaido University, 16H02852
  • 極低消費電力型マルチメディアIoTシステムの研究開発               
    戦略的情報通信研究開発推進事業(SCOPE)先進的電波有効利用型
    Mar. 2018 - Mar. 2020
    宮永 喜一, 筒井 弘
    総務省, 北海道大学, Coinvestigator
  • 戦略的情報通信研究開発推進事業(SCOPE)先進的電波有効利用型
    Apr. 2018 - Mar. 2019
    岡田 健一, 堀 真一, 大島 直樹, 筒井 弘
    総務省, 北海道大学, Coinvestigator
  • A Study on Efficient Video Acquisition Approach based on Motion-Compensated Frame Interpolation Using High-Resolution Video and High-Frame-Rate Video
    Grants-in-Aid for Scientific Research Grant-in-Aid for Young Scientists (B)
    01 Apr. 2014 - 31 Mar. 2017
    Tsutsui Hiroshi
    Recent CMOS image sensors have several image acquisition modes such as (1) high-resolution and normal-frame-rate and (2) low-resolution and high-frame-rate. Assuming these two types of video, that is high-resolution video and high-frame-rate video, can be obtained simultaneously, a motion-compensated frame interpolation method to generate high-resolution and high-frame-rate video from these videos is proposed. By using the proposed approach, efficient video acquisition can be archived. Considering adaptive processing based on motions in video sequences, a image shrinking based high-speed moving region extraction method is also proposed.
    Japan Society for the Promotion of Science, Grant-in-Aid for Young Scientists (B), Hokkaido University, 26870009
  • Architecture for Large-scale Long-term Digital Storage System
    Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (B)
    2011 - 2013
    OCHI Hiroyuki, SATO Takashi, TSUTSUI Hiroshi, NAKAMURA Yukihiro
    To realize digital data storage systems of extremely long lifetime, architecture for sealed wafer-scale mask ROM that is capable of contactless power delivery and contactless mutual communication has been investigated in order to enhance robustness of mask ROM device.
    As for contactless power delivery, on-chip solar cell has been investigated, and "boost interleaved solar cell" has been proposed. As for contactless mutual communication, low power Tx/Rx circuits to utilize on-chip dipole antenna. NAND-type high-density low operating voltage mask ROM has been designed and evaluated. Finally, hierarchical architecture with aggressive power-gating feature has been developed.
    Japan Society for the Promotion of Science, Grant-in-Aid for Scientific Research (B), 京都大学, Coinvestigator not use grants, Competitive research funding, 23300015
  • Acceleration of Timing Analysis using Monte Carlo Methods
    Grants-in-Aid for Scientific Research Grant-in-Aid for Scientific Research (B)
    2010 - 2012
    SATO Takashi, OCHI Hiroyuki, TSUTSUI Hiroshi
    Timing constraint is one of the most important objectives in advanced integrated circuit design. In this project, acceleration of the timing analysis is studied. Based on the measurements on test-chips, variability- and degradation-aware device models have been first proposed to accurately handle timing information of miniaturized devices. A new algorithm of timing analysis has then been implemented on a hardware, thorough which by more than ten times acceleration has been achieved while maintaining advantages of Monte Carlo based methods that can handle arbitrary delay distribution.
    Japan Society for the Promotion of Science, Grant-in-Aid for Scientific Research (B), Kyoto University, Coinvestigator not use grants, Competitive research funding, 22360143
  • スケーラブル動画像符号化の組込み向け実装法に関する研究
    科学研究費助成事業
    2002 - 2004
    筒井 弘
    本研究の目的は,スケーラブル動画像符号化の組込み機器への効率的な実装手法の提案である.前年度までに於て,JPEG2000スケーラブル符号化/復号化を対象として,様々なシステム要求に対して最適な実装を容易かつ効率的に実現可能とするスケーラブルなデザインフレームワークの実現を目標とし,検討および実装/評価を行っている.本年度は,これまでに実装を行ったソフトウェアならびにハードウェア処理モジュールを組合せ,フレームワークの全体の構築を行い,「組込み向けJPEG2000符号化方式の実装法」と題した博士論文にまとめた.提案デザインフレームワークでは,アプリケーションの要求や設計時の制約条件に応じて,共通モジュールを選択的に利用することによって,最適なJPEG2000復号器/復号器/コーデックの実装を得ることができる.
    さらに,JPEG2000で各フレームを圧縮する動画像符号化方式であるMotion JPEG2000に関して,組込み機器での利用が見込まれる,低ビットレート符号化時における主観画質の向上手法を提案した.提案手法ではJPEG2000の持つ特長と人間の視覚特性を利用して,Motion JPEG2000の主観的画質を向上させる.JPEG2000は変換に離散ウェーブレット変換(DWT)を用いているために,符号化の過程で画像内の位置に応じて符号量の割り当てを制御することが容易となっている.人間の視覚特性は刺激の空間周波数,時間周波数に依存して特性が変化し,周波数が高いほど感度が低下する.提案する手法は,人間の視覚特性を利用して,時間周波数,空間周波数が高い領域に割り当てる符号量を減らし,それ以外の領域に割り当てる符号量を増やす.その結果,動画像全体の主観的画質を向上させることに成功した.
    日本学術振興会, 特別研究員奨励費, 京都大学, 02J02016