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Motohisa Junichi

Faculty of Information Science and Technology Electronics for Informatics Integrated Systems EngineeringProfessor
Research Center for Integrated Quantum ElectronicsProfessor

Researcher basic information

■ Degree
  • 博士(工学), 東京大学
■ URL
researchmap URLホームページURL■ Various IDs
Researcher number
  • 60212263
ORCID IDJ-Global ID■ Research Keywords and Fields
Research Keyword
  • 選択成長
  • 有機金属気相成長
  • 量子ドット
  • 結晶成長
  • 半導体
  • フォトニック結晶
  • 表面超格子
  • フォトルミネセンス
  • ヘテロ構造
  • 論理回路
  • 半導体ナノワイヤ
  • 有機金属気相成長法
  • 再成長
  • マスクパターン
  • 線欠陥・点欠陥導入構造
  • スーパーアトム
  • 人工結晶
  • 多段原子ステップ
  • 光取り出し効率
  • 原子ステップ
  • 顕微フォトルミネセンス
  • ナノ構造周期配列構造
  • 人工原子
  • フォトニックバンドギャップ
  • 単一光子光源
  • 加工基板
  • 3角格子
  • 時間領域差分(FDTD)法
  • 電界効果トランジスタ
  • フォトニック結晶スラブ
  • 半導体デバイス
  • 半導体物性
  • 半導体ナノ構造
  • 半導体結晶成長
Research Field
  • Nanotechnology/Materials, Optical engineering and photon science
  • Manufacturing Technology (Mechanical Engineering, Electrical and Electronic Engineering, Chemical Engineering), Electron device and electronic equipment
  • Manufacturing Technology (Mechanical Engineering, Electrical and Electronic Engineering, Chemical Engineering), Electric and electronic materials
  • Nanotechnology/Materials, Crystal engineering
  • Nanotechnology/Materials, Applied physical properties
■ Educational Organization

Career

■ Career
Career
  • Apr. 2020 - Present
    Hokkaido University, Research Center for Integrated Quantum Electronics, Director, Japan
  • Apr. 2006 - Present
    Hokkaido University, 大学院・情報科学研究科, 教授
  • Apr. 2001 - Mar. 2006
    Hokkaido University, Research Center for Integrated Quantum Electronics, 助教授
  • Apr. 1994 - Mar. 2001
    Hokkaido University, 量子界面エレクトロニクス研究センター, 助教授
  • Apr. 1993 - Mar. 1994
    Hokkaido University, 量子界面エレクトロニクス研究センター, 講師
Position History
  • 量子集積エレクトロニクス研究センター長, 2020年4月1日 - 2022年3月31日
  • 量子集積エレクトロニクス研究センター長, 2022年4月1日 - 2024年3月31日
  • 量子集積エレクトロニクス研究センター長, 2024年4月1日 - 2026年3月31日

Research activity information

■ Papers
■ Other Activities and Achievements
  • Study on mask materials for GaN nanowire fabrication using contactless PEC etching
    古内久大; 古内久大; 本久順一; 本久順一; 佐藤威友; 佐藤威友, 応用物理学会春季学術講演会講演予稿集(CD-ROM), 71st, 2024
  • Effect of UVA light on GaN nanowire fabrication using contactless PEC etching
    古内久大; 古内久大; 本久順一; 本久順一; 佐藤威友, 応用物理学会秋季学術講演会講演予稿集(CD-ROM), 85th, 2024
  • 電気めっき法によるGaNへのPt電極の形成と電気特性評価
    小原康; 島内道人; 佐藤威友; 本久順一, 応用物理学会北海道支部/日本光学会北海道支部合同学術講演会講演予稿集, 55th-16th, 2020
  • Photoluminescence of Zn-Doped InP Nanowires: Mixing of Crystal Structures, Donor-Acceptor Pair Recombination, and Surface Effects
    J. Motohisa; H. Kameda; M. Sasaki; S. Hara; K. Tomioka, Collected Abstract of the 29th International Conference on Defects in Semiconductors (ICDS 2017), Matsue, Japan, July 31-August 4, 2017, TuP-33, 1, 2, Aug. 2017, [Peer-reviewed]
    English, Summary international conference
  • Density Control of InP-based Nanowires and Nanowire Quanutm Dots
    S. Yanase; H. Sasakura; S. Hara; J. Motohisa, Collected Abstract of the 35th Electronic Materials Symposium (EMS-35), Moriyama, Japan, July 6-8, 2016, Th3-2, 1, 2, Jul. 2016, [Peer-reviewed]
    English, Summary international conference
  • Growth and Characterization of Vertical Nanocavity Using Core-Multishell Nanowires
    T. Wada; S. Hara; J. Motohisa, Collected Abstract of the 2015 International Conference on Solid State Devices and Materials (SSDM 2015), Sapporo, Japan, September 27-30, 2015, D-4-3, 1, 2, Sep. 2015, [Peer-reviewed]
    English, Summary international conference
  • Stochastic Resonance Ring-delay-line ADC for a low amplitude signal detection
    木下 康大; 池辺 将之; 本久 順一, 電子情報通信学会技術研究報告 = IEICE technical report : 信学技報, 115, 124, 33, 36, 02 Jul. 2015
    電子情報通信学会, Japanese
  • Stochastic Resonance Ring-delay-line ADC for a low amplitude signal detection
    木下 康大; 池辺 将之; 本久 順一, 映像情報メディア学会技術報告 = ITE technical report, 39, 22, 33, 36, Jul. 2015
    映像情報メディア学会, Japanese
  • Photoluminescence Study of Doping-Induced Crystal Structure Transition in Indium Phosphide Nanowires
    H. Kameda; S. Yanase; K. Tomioka; S. Hara; J. Motohisa, Collected Abstract of the 17th International Conference on Modulated Semiconductor Structures (MSS-17), Sendai, Japan, July 26-31, 2015, Mo-PM-33, 1, 1, Jul. 2015, [Peer-reviewed]
    English, Summary international conference
  • A-1-27 Intermittent Working TDC with Multi-phase Clock signals using NAND Delay Chain
    Uchida Daisuke; Ikebe Masayuki; Motohisa Junichi; Sano Eiichi, Proceedings of the IEICE General Conference, 2015, 27, 27, 24 Feb. 2015
    The Institute of Electronics, Information and Communication Engineers, Japanese
  • CI-4-4 Tunnel FET using III-V nanowire/Si heterojunctions
    Tomioka Katsuhiro; Motohisa Junichi; Fukui Takashi, Proceedings of the IEICE General Conference, 2015, 2, "SS, 94"-"SS-95", 24 Feb. 2015
    The Institute of Electronics, Information and Communication Engineers, Japanese
  • Design and Growth of Nanowire Nanocavity
    T. Wada; S. Hara; J. Motohisa, Collected Abstract of the 2014 International Conference on Solid State Devices and Materials (SSDM 2014), Tsukuba, Japan, September 8-11, 2014, PS-13-12, 1, 2, Sep. 2014, [Peer-reviewed]
    English, Summary international conference
  • High-Efficiency Dickson Charge Pump using an Automatic threshold-Voltage Cancellation
    KAN Xie; 池辺将之; 本久順一; 佐野栄一, 電子情報通信学会技術研究報告, 114, 120(ICD2014 19-30), 2014
  • Study on a Single Slope ADC with intermittent TDC
    染谷槙人; 内田大輔; 池辺将之; 本久順一; 佐野栄一, 電子情報通信学会技術研究報告, 114, 120(ICD2014 19-30), 2014
  • 半導体ナノワイヤを用いた高効率太陽電池に関する研究
    本久順一; 原真二郎, 岩谷直治記念財団研究報告書, 36, 101, 103, 01 Aug. 2013
    Japanese
  • A-1-14 A 11b 5.luW Multi-slope ADC with TDC using Multi-phase Clocks
    Kim Kisu; Uchida Daisuke; Ikebe Masayuki; Motohisa Junichi; Sano Eiichi, Proceedings of the IEICE General Conference, 2013, 14, 14, 05 Mar. 2013
    The Institute of Electronics, Information and Communication Engineers, Japanese
  • Low-Power-Consumption Driving in Single-Slope ADC with Multi-phase TDC
    内田大輔; 染谷槙人; 池辺将之; 本久順一; 佐野栄一, 電子情報通信学会技術研究報告, 113, 112(ICD2013 24-46), 2013
  • Composition-Dependent Growth Dynamics of InGaAs Nanowires in Selective-Area Metal-Organic Vapor Phase Epitaxy
    Y. Kohashi; S. Hara; J. Motohisa, Collected Abstract of the 2013 International Symposium on Advanced Nanodevices and Nanotechnology (ISANN 2013), Poipu Beach, Kauai, Hawaii, USA, December 8-13, 2013, Thu2-5, 1, 1, 2013, [Peer-reviewed]
    English, Summary international conference
  • Study on the Lateral Growth on GaAs Nanowires
    T. Wada; Y. Kohashi; S. Hara; J. Motohisa, Collected Abstract of the 32nd Electronic Materials Symposium (EMS-32), Moriyama, Japan, July 10-12, 2013, Fr1-12, 1, 2, 2013
    English, Summary international conference
  • Influence of V/III Ration on the Growth of InGaAs Nanowires in Selective-Area MOVPE
    Y. Kohashi; S. Hara; J. Motohisa, Collected Abstract of the 40th International Sympsium on Compound Semiconductors (ISCS 2013), Kobe, Japan, May 19-23, 2013, WeB2-2, 1, 2, 2013, [Peer-reviewed]
    English, Summary international conference
  • An interleaved ramp-wave generator for high-speed single-slope ADC
    内田大輔; 池辺将之; 本久順一; 佐野栄一; 近藤亮, 電子情報通信学会技術研究報告, 112, 159, 45, 48, 26 Jul. 2012
    電子情報通信学会, Japanese
  • Local Adaptive High-Speed Single Image Dehazing
    MIZUNO Akira; IKEBE Masayuki; IGARASHI Masaki; MOTOHISA Junichi, ITE Technical Report, 36, 20, 9, 12, 21 May 2012
    We propose a fast single image dehazing method that uses the local statistics of the dark channel. In single image dehazing, a haze-free image is created from a single hazed image by calculating the transmission map of the haze. There is a high computational cost to this process because it requires a complex matrix operation. We have therefore focused on the local histogram of the dark channel in order to refine the transmission map more quickly. In the proposed method, edges of the regions and objects in the transmission map are recovered using the local histogram of the dark channel. We achieved an operation time dozens of times faster than the conventional method, thereby successfully reducing the memory consumption., The Institute of Image Information and Television Engineers, Japanese
  • Study on Automatic Parameter Control for Local Adaptive Tone Mapping
    加藤 直人; 池辺 将之; 本久 順一; 下山 荘介, 研究報告コンピュータビジョンとイメージメディア(CVIM), 2012, 18, 1, 6, 16 May 2012
    本稿では局所ヒストグラム平坦化を基にしたダイナミックレンジ圧縮技術の自動制御手法を提案する.局所ヒストグラム平坦化ではフィルタカーネル毎のヒストグラムを用いて補正関数を生成する.フィルタカーネル内の輝度値に偏りが大きい場合,補正関数の勾配が急になり不自然なコントラスト強調を招く.我々は今までに,補正関数の変動域に対して上限値と下限値を設定し,変動域を制限する手法を提案してきた.本研究は,画像の情報を利用して上限値と下限値を自動的に決定することを目的とする.特に今回の報告では,夜景画像を対象とし,その補正において影響が大きい上限値を決定した.夜景画像の補正指針として,主に,暗い領域を良好に認識できるように補正すること,光源等の比較的明るい領域を適切な明るさに補正することを考慮した.指針を基に上限値を手動で決定したところ,画像のヒストグラムとエッジ量が上限値の決定に寄与しているという知見を得た.提案手法では,この知見に基づいて上限値の自動化を行なった.主観評価を行ったところ,提案手法は既存手法に比べ,画像補正が適切であるいう結果が得られた.In this paper, we propose an automatic control method of parameters for local adaptive tone mapping based on Local Histogram Equalization (LHE). The tone mapping function is generated by a cumulative histogram in LHE. When luminance in the filter kernel has a large bias, gradient of mapping function is steep and the mapped image has unnatural artifacts. By setting upper and lower limits of fluctuation range of tone mapping function, our conventional method controls spatial contrast of the image. Our goal is setting upper and lower limits automatically. In this study, we focus on nightscape image and propose automatic control with upper limits. We have two main considerations about enhancement of nightscape image: remedying obscure regions, and adjusting bright regions like lights appropriately. Based on the considerations, we found knowledge that edge and histogram of the image have a relationship with upper limits. In subjective evaluation of the image quality, we confirmed that our method is better than conventional one., Japanese
  • A-1-2 A Low Power Multi-slope ADC with Time to Digital Converter
    Kim Kisu; Ikebe Masayuki; Motohisa Junichi; Amemiya Yoshihito; Sano Eiichi, Proceedings of the IEICE General Conference, 2012, 2, 2, 06 Mar. 2012
    The Institute of Electronics, Information and Communication Engineers, Japanese
  • C-12-67 Direct Conversion Mixer with DC offset cancelling
    Kondou Akira; Ikebe Masayuki; Motohisa Junichi; Amemiya Yoshihito; Sano Eiichi, Proceedings of the IEICE General Conference, 2012, 2, 139, 139, 06 Mar. 2012
    The Institute of Electronics, Information and Communication Engineers, Japanese
  • Zinc Blende and Wurtzite Crystal Phase Mixing and Transition in Indium Phosphide Nanowires (vol 11, pg 4314, 2011)
    Keitaro Ikejiri; Yusuke Kitauchi; Katsuhiro Tomioka; Junichi Motohisa; Takashi Fukui, NANO LETTERS, 12, 1, 524, 525, Jan. 2012
    English, Others
  • Selective-Area Growth of Highly Uniform and Thin InGaAs Nanowires by Two-Step growth Method
    Y. Kohashi; S. Sakita; S. Hara; J. Motohisa, Collected Abstract of the 2012 Material Research Society (MRS) Fall Meeting, Boston, Massachusetts, USA, November 25-30, 2012, FF9.01, 1, 1, 2012, [Peer-reviewed]
    English, Summary international conference
  • Control of Diameter and Pitch of InGaAs Nanowire Arrays in Selective-Area Metal-Organic Vapor-Phase Epitaxy
    Y. Kohashi; S. Sakita; S. Hara; J. Motohisa, Collected Abstract of the 2012 International Conference on Solid State Devices and Materials (SSDM 2012), Kyoto, Japan, September 25-27, 2012, C-2-3, 1, 2, 2012, [Peer-reviewed]
    English, Summary international conference
  • Fabrication of Highly Uniform InGaAs Nanowires in 30 nm-Diameter Openings with Lower Density in Selective-Area Metal-Organic Vapor-Phase Epitaxy
    Y. Kohashi; Y. Kobayashi; M. Yatago; S. Hara; J. Motohisa, Collected Abstract of the 31st Electronic Materials Symposium (EMS-31), Izu, Japan, July 11-13, 2012, Th5-2, 1, 2, 2012
    English, Summary international conference
  • Fast bilateral filtering using recursive moving sum
    IGARASHI MASAKI; IKEBE MASAYUKI; SHIMOYAMA SOHSUKE; MOTOHISA JUNICHI, Nonlinear Theory Its Appl IEICE (Web), 3, 2, 222-232 (J-STAGE), 232, 2012
    We propose a constant-time algorithm for a bilateral filter. Bilateral filter can be converted into the operation of three-dimensional (3D) convolution. By using recursive moving sum, we can reduce the number of calculations needed to construct a pseudo-Gaussian filter. Applying one-dimensional Gaussian filter to the 3D convolution, we achieved a constant-time bilateral filter. We used a 3-GHz CPU without SIMD instructions, or multi-thread operations. We confirmed our proposed bilateral filter to be processed in constant time. In practical conditions, high PSNR values over 40 dB are obtained., The Institute of Electronics, Information and Communication Engineers, English
  • An approach to control halo suppression for local adaptive tone mapping
    Shimoyama Sousuke; Ikebe Masayuki; Igarashi Masaki; Mizuno Akira; Motohisa Junichi, ITE Technical Report, 35, 47, 9, 12, 11 Nov. 2011
    Local Histogram Equalization (LHE), which is efficient for High Dynamic Range (HDR) compression, requires a large amount of calculation and induces unnatural image quality. Using checker-wise histogram acquisition and line buffer, memory accessing for local histograms is processed in O(1) time. For improving image quality, we proposed approximation of LHE by compositing gamma functions. Moreover the weighting of local histogram is developed by introducing mean values of bins for the suppression and control of halo effect. We set the range of parameters for controlling halo effect by sensitivity evaluation., The Institute of Image Information and Television Engineers, Japanese
  • A-1-37 Metastability Reducing for Single-Slope ADC with Time to Digital Converter
    Kim Kisu; Ikebe Masayuki; Motohisa Junichi; Amemiya Yoshihito; Sano Eiichi, Proceedings of the Society Conference of IEICE, 2011, 37, 37, 30 Aug. 2011
    The Institute of Electronics, Information and Communication Engineers, Japanese
  • A-1-24 Current Driven Mixer with Intermediate Frequency Amplifier using Active Inductor Load
    Kondou Akira; Ikebe Masayuki; Motohisa Junichi; Amemiya Yoshihito; Sano Eiichi, Proceedings of the Society Conference of IEICE, 2011, 24, 24, 30 Aug. 2011
    The Institute of Electronics, Information and Communication Engineers, Japanese
  • A-4-7 A Note on the Mach Bands in the Locally Transformed Image
    Shimoyama Sohsuke; Ikebe Masayuki; Igarashi Masaki; Mizuno Akira; Motohisa Junichi, Proceedings of the Society Conference of IEICE, 2011, 101, 101, 30 Aug. 2011
    The Institute of Electronics, Information and Communication Engineers, Japanese
  • 23aTN-2 Polarized photoluminescence from single wurtzite InP/InAs/InP core-multishell nanowires
    Masumoto Y.; Hirata Y.; Mohan P.; Motohisa J.; Fukui T., Meeting abstracts of the Physical Society of Japan, 66, 2, 777, 777, 24 Aug. 2011
    The Physical Society of Japan (JPS), Japanese
  • High quality image synthesis of fast local adaptive tone mapping
    Shimoyama Sousuke; Ikebe Masayuki; Igarashi Masaki; Mizuno Akira; Motohisa Junichi, ITE Technical Report, 35, 19, 13, 16, 20 May 2011
    Local Histogram Equalization (LHE), which is efficient for High Dynamic Range (HDR) compression, requires a large amount of calculation and induces unnatural image quality. Using checker-wise histogram acquisition and line buffer, memory accessing for local histograms is processed in O(1) time. For improving image quality, we proposed approximation of LHE by compositing gamma functions. Moreover the control of local histogram is developed by introducing mean values of bins for suppression of stripe artifacts arising from small number of bins and halo effect. Using C++, we achieved two million pixels per 0.45sec operation., The Institute of Image Information and Television Engineers, Japanese
  • C-2-32 Design of Inductorless Low Noise Amplifier for Multi-Standard Wireless Communication System
    Kondou Akira; Ikebe Masayuki; Motohisa Junichi; Sano Eiichi, Proceedings of the IEICE General Conference, 2011, 1, 70, 70, 28 Feb. 2011
    The Institute of Electronics, Information and Communication Engineers, Japanese
  • A-1-34 Clock-Period Comparison PLL Consisting of Phase-Shift Direction Detector
    Makihara Yukinobu; Ikebe Masayuki; Motohisa Junichi; Sano Eiichi, Proceedings of the IEICE General Conference, 2011, 34, 34, 28 Feb. 2011
    The Institute of Electronics, Information and Communication Engineers, Japanese
  • D-11-66 FAST IMAGE FILTER DEFINED INDUCTIVELY
    Igarashi Masaki; Ikebe Masayuki; Shimoyama Sohsuke; Motohisa Junichi, Proceedings of the IEICE General Conference, 2011, 2, 66, 66, 28 Feb. 2011
    The Institute of Electronics, Information and Communication Engineers, Japanese
  • D-11-67 Evaluation of Sophisticated Dynamic Range Compression Method using Composite Function
    Shimoyama Sohsuke; Ikebe Masayuki; Igarashi Masaki; Yamano Kenta; Motohisa Junichi, Proceedings of the IEICE General Conference, 2011, 2, 67, 67, 28 Feb. 2011
    The Institute of Electronics, Information and Communication Engineers, Japanese
  • D-11-92 "LDR to HDR" Algorithm for Error Diffused Images
    Mizuno Akira; Ikebe Masayuki; Motohisa Junichi, Proceedings of the IEICE General Conference, 2011, 2, 92, 92, 28 Feb. 2011
    The Institute of Electronics, Information and Communication Engineers, Japanese
  • 高ダイナミックレンジ画像合成技術と適応的局所トーンマッピング
    池辺将之; 下山荘介; 本久順一, 応用物理学関係連合講演会講演予稿集(CD-ROM), 58th, 2011
  • InP Nanowire Light Emitting Diodes
    S. Maeda; K. Tomioka; S. Hara; J. Motohisa, Collected Abstract of the 2011 Material Research Society (MRS) Fall Meeting, Boston, Massachusetts, USA, November 28-December 2, 2011, BB20.48, 1, 1, 2011, [Peer-reviewed]
    English, Summary international conference
  • Effect of Growth Temperature on the Growth of InGaAs Nanowires in Selective-Area MOVPE
    Y. Kohashi; S. Hara; J. Motohisa, Collected Abstract of the 2011 International Symposium on Advanced Nanodevices and Nanotechnology (ISANN 2011), Kaanapali, Maui, Hawaii, USA, December 4-9, 2011, P1-, 1, 1, 2011, [Peer-reviewed]
    English, Summary international conference
  • Fabrication of III-V Nanowire-Based Surrounding-Gate Transistors on Si Substrate
    K. Tomioka; J. Motohisa; S. Hara; T. Fukui, Collected Abstract of the 220th ECS Meeting and Electrochemical Energy Summit, Boston, Massachusetts, USA, October 9-14, 2011, #1885, 1, 1, 2011, [Peer-reviewed]
    English, Summary international conference
  • Fabrication and Characterization of InAs Nanowire Vertical Surrounding-Gate FETs
    Y. Kobayashi; Y. Kohashi; S. Hara; J. Motohisa, Collected Abstract of the 2011 International Workshop on Quantum Nanostructures and Nanoelectronics (QNN 2011), Tokyo, Japan, October 3-4, 2011, P-5, 1, 1, 2011, [Peer-reviewed]
    English, Summary international conference
  • Study on the Growth of In-Rich InGaAs Nanowires by Selective-Area Metal-Organic Vapor-Phase Epitaxy
    Y. Kohashi; S. Hara; J. Motohisa, Collected Abstract of the 2011 International Conference on Solid State Devices and Materials (SSDM 2011), Nagoya, Japan, September 28-30, 2011, KM-5-4, 1, 2, 2011, [Peer-reviewed]
    English, Summary international conference
  • Composition-Dependent Growth Dynamics of InGaAs Nanowires in Selective-Area MOVPE
    Y. Kohashi; T. Sato; S. Hara; T. Fukui; J. Motohisa, Collected Abstract of the 38th International Sympsium on Compound Semiconductors (ISCS 2011), Berlin, Germany, May 22-26, 2011, Tu-4A.4, 1, 2, 2011, [Peer-reviewed]
    English, Summary international conference
  • Academic roadmap in research field of applied physics
    松田 一成; 江馬 一弘; 野田 武司; 早瀬 潤子; 本久 順一; 渡部 平司, 應用物理, 79, 8, 690, 690, 10 Aug. 2010
    Japanese
  • High-Speed Ramp-Wave Generator with Interleaved DAC for Single-Slope ADC
    MAKIHARA Yukinobu; SHIN Mhun; IKEBE Masayuki; MOTOHISA Junichi; SANO Eiichi, ITE Technical Report, 34, 29, 89, 93, 22 Jul. 2010
    We have proposed the method of re-measuring quantizing error of Single-Slope ADC for CMOS imager with TDC (Time-to-Digital Converter). Using n-bits TDC, the proposed ADC performed 2^n time faster operation. This method requires high-speed Ramp wave generation. Therefore, in this paper, we evaluated speed up with interleave operation and output summing of DACs. Although multiple DACs are used, there is no increase of quantization unit devices. In the interleaved DAC with 2^<n-m> of m-bits DACunits, it can perform as a Delta DAC (-2^1≦ΔVout≦2^<m-1>). We designed the current-controlled DAC circuits using 0.25um CMOS process. At 200-MHz-clock operation, we confirmed 800-MHz 12-bit operations with four of 10-bits DACunits., The Institute of Image Information and Television Engineers, Japanese
  • Center-weighted O(1) Bilateral Filtering
    IGARASHI Masaki; IKEBE Masayuki; SHIMOYAMA Sousuke; YAMANO Kenta; MOTOHISA Junichi, ITE Technical Report, 34, 19, 17, 20, 31 May 2010
    We propose a O(1) algorithm for bilateral filter using center-weighted spatial filter. We show that a bilateral filter can be converted into weighted histogram operation. Applying line buffers of column histograms, we can reduce the number of calculation needed to construct recursive center-weighted local histogram. We used a 2-GHz CPU with our method and confirmed that processing time is independent of filter radius. Also, we achieved high PSNR over 40dB., The Institute of Image Information and Television Engineers, Japanese
  • Semiconductor superlattice : 40 years after proposal
    本久 順一; 早瀬 潤子; 永津 雅章; 納冨 昭宏, 應用物理, 79, 3, 190, 190, 10 Mar. 2010
    Japanese
  • CT-2-4 InAs-BASED NANOWIRE TRANSISTORS
    Motohisa Junichi; Tanaka Tomotaka; Tomioka Katsuhiro; Fukui Takashi, Proceedings of the IEICE General Conference, 2010, 2, "SS, 45", 02 Mar. 2010
    The Institute of Electronics, Information and Communication Engineers, Japanese
  • C-2-19 A 3.1-10.6GHz CMOS UWB LNA with Common-Drain feedback
    Kondou Akira; Ikebe Masayuki; Motohisa Junichi; Sano Eiichi, Proceedings of the IEICE General Conference, 2010, 1, 62, 62, 02 Mar. 2010
    The Institute of Electronics, Information and Communication Engineers, Japanese
  • A-1-13 Characteristics Analysis of Single-Slope ADC with TDC
    Shin Muung; Ikebe Masayuki; Makihara Yukinobu; Motohisa Junichi; Sano Eiichi, Proceedings of the IEICE General Conference, 2010, 13, 13, 02 Mar. 2010
    The Institute of Electronics, Information and Communication Engineers, Japanese
  • A-1-14 Evaluation of noise influence of frequency characteristics on clock-period comparison PLL
    Makihara Yukinobu; Ikebe Masayuki; Motohisa Junichi; Sano Eiichi, Proceedings of the IEICE General Conference, 2010, 14, 14, 02 Mar. 2010
    The Institute of Electronics, Information and Communication Engineers, Japanese
  • D-11-39 Evaluation of High Efficiency Local Histogram Equalization Method using Gamma Function
    Shimoyama Sohsuke; Ikebe Masayuki; Igarashi Masaki; Yamano Kennta; Motohisa Junichi, Proceedings of the IEICE General Conference, 2010, 2, 39, 39, 02 Mar. 2010
    The Institute of Electronics, Information and Communication Engineers, Japanese
  • 熱ナノインプリントを利用したMOVPE選択成長
    井上理樹; 佐藤拓也; 池辺将之; 原真二郎; 福井孝志; 本久順一, 応用物理学関係連合講演会講演予稿集(CD-ROM), 57th, 2010
  • High-Speed Ramp-Wave Generator with Interleaved DAC for Single-Slope ADC
    牧原幸伸; SHIN Mhun; 池辺将之; 本久順一; 佐野栄一, 電子情報通信学会技術研究報告, 110, 140(ICD2010 21-38), 2010
  • Growth Mechanism of III-V Semiconductor Nanowires in Selective-Area Metal-Organic Vapor Phase Epitaxy
    J. Motohisa; H. Yoshida; K. Ikejiri; Y. Kitauchi; K. Tomioka; S. Hara; K. Hiruma; T. Fukui, Collected Abstract of the 2010 International Chemical Congress of Pacific Basin Societies (PACIFICHEM 2010), Honolulu, Hawaii, USA, December 15-20, 2010, 1, 1, 2010, [Peer-reviewed]
    English, Summary international conference
  • Integration of III-V NW-Based Vertical FETs on Si and Device Concept for Tunnel FET Using III-V/Si Heterojunctions
    K. Tomioka; J. Motohisa; S. Hara; K. Hiruma; T. Tanaka; T. Fukui, Collected Abstract of the 2010 Material Research Society (MRS) Fall Meeting, Boston, Massachusetts, USA, November 29-December 3, 2010, W5.5, 1, 1, 2010, [Peer-reviewed]
    English, Summary international conference
  • Free-Standing GaAs/AlGaAs Heterostructure Nanowires with a Quantum Well Formed by Selective-Area Metal-Organic Vapor-Phase Epitaxy
    K. Hiruma; A. Hayashida; T. Sato; S. Hara; J. Motohisa; T. Fukui, Collected Abstract of the 16th International Conference on Crystal Growth (ICCG-16), Beijing, China, August 8-13, 2010, 2010, [Peer-reviewed]
    English, Summary international conference
  • Selective-Area Growth of InGaAs Nanowires on Si Substrate
    K. Tomioka; J. Motohisa; S. Hara; K. Hiruma; T. Fukui, Collected Abstract of the Nano Science + Engineering Symposia, the SPIE Optics + Photonics Conferences 2010, San Diego, California, USA, August 1-5, 2010, 7768-8, 1, 1, 2010, [Peer-reviewed]
    English, Summary international conference
  • Electrical Characterization of InGaAs Nanowire MISFETs Fabricated by Dielectric-First Process
    Y. Kohashi; T. Sato; K. Tomioka; S. Hara; T. Fukui; J. Motohisa, Collected Abstract of the 29th Electronic Materials Symposium (EMS-29), Izu, Japan, July 14-16, 2010, 1, 2, 2010
    English, Summary international conference
  • Selective-Area MOVPE Growth Using Masked Substrates Prepared by Nanoimprint Lithography
    M. Inoue; T. Sato; M. Ikebe; S. Hara; T. Fukui; J. Motohisa, Collected Abstract of the 29th Electronic Materials Symposium (EMS-29), Izu, Japan, July 14-16, 2010, 1, 2, 2010
    English, Summary international conference
  • Lattice-Mismatched Growth of InGaAs Nanowires Formed on GaAs (111)B by Selective-Area MOVPE
    M. Yoshimura; K. Tomioka; K. Hiruma; S. Hara; J. Motohisa; T. Fukui, Collected Abstract of the 29th Electronic Materials Symposium (EMS-29), Izu, Japan, July 14-16, 2010, 1, 2, 2010
    English, Summary international conference
  • Fabrication of GaAs/InAs Axial Nanowires on Si by Selective-Area MOVPE with Regrowth Method
    K. Tomioka; J. Motohisa; S. Hara; K. Hiruma; T. Fukui, Collected Abstract of the 37th International Symposium on Compound Semiconductors (ISCS-37), Kagawa, Japan, May 31-June 4, 2010, p. 328, 328, 328, 2010, [Peer-reviewed]
    English, Summary international conference
  • Fabrication and Characterization of InAs Tubular Channel FETs using Core-Shell Nanowires Grown by SA-MOVPE
    T. Sato; J. Motohisa; E. Sano; S. Hara; T. Fukui, Collected Abstract of the 15th International Conference on Metal-Organic Vapor Phase Epitaxy (ICMOVPE-XV), Incline Village, Nevada, USA, May 23-28, 2010, p. 31, 31, 31, 2010, [Peer-reviewed]
    English, Summary international conference
  • Heteroepitaxial growth of InGaAs nanowires formed on GaAs(111)B by Selective-Area MOVPE
    M. Yoshimura; K. Tomioka; K. Hiruma; S. Hara; J. Motohisa; T. Fukui, Collected Abstract of the 15th International Conference on Metal-Organic Vapor Phase Epitaxy (ICMOVPE-XV), Incline Village, Nevada, USA, May 23-28, 2010, p. 19, 19, 19, 2010, [Peer-reviewed]
    English, Summary international conference
  • Selective-Area Growth of InGaAs Nanowires on Si Substrate
    K. Tomioka; M. Yoshimura; J. Motohisa; S. Hara; K. Hiruma; T. Fukui, Collected Abstract of the 15th International Conference on Metal-Organic Vapor Phase Epitaxy (ICMOVPE-XV), Incline Village, Nevada, USA, May 23-28, 2010, p. 19, 19, 19, 2010, [Peer-reviewed]
    English, Summary international conference
  • A high-speed local contrast correction method without local pixel-block dependency
    Shimoyama Sousuke; Ikebe Masayuki; Igarashi Masaki; Motohisa Junichi, ITE Technical Report, 33, 56, 5, 8, 10 Dec. 2009
    Local Histogram Equalization (LHE), which is efficient for High Dynamic Range (HDR) compression, requires a large amount of calculation and induces unnatural image quality. Using checker-wise histogram acquisition and line buffer, memory accessing for local histograms is processed in O(1) time. Moreover, for improving image quality, we proposed approximation of LHE by compositing gamma functions. Setting parameters to each luminance tone, image quality is regulated adaptively. Using C++, we achieved two million pixels per 0.3sec operation and real-time VGA movie processing., The Institute of Image Information and Television Engineers, Japanese
  • Progress in analytical technologies for a single molecule and a single cell
    高村 禅; 沼田 秀昭; 野田 武司; 本久 順一, 應用物理, 78, 12, 1102, 1102, 10 Dec. 2009
    Japanese
  • Meta-Stability Characteristic of Single-Slope ADC with Time to Digital Convertor for CMOS-Image Sensor
    Shin Mhun; IKEBE Masayuki; MOTOHISA Junichi; SANO Eiichi, ITE Technical Report, 33, 39, 75, 80, 01 Oct. 2009
    We have proposed the method of re-measuring quantizing error of Single-Slope ADC for CMOS imager with TDC (Time-to-Digital Converter). Here, we examined adding TDC by D-FF with multi-phase clock, vis-a-vis Delay-line TDC with CMOS inverters. For the operation at 200MHz using 0.25um process, we verified to compensate the process variation of process within 8%, and to operate TDC in DNL: ±0.25LSB, INL: ±0.4LSB by simulation. In addition, utilizing deformation thermo-code, we reduced D-FFs of TDC. For 12bit A/D Converter, when the first stage 9bit ADC and the second stage 3bit TDC are considered, we can design the proposed ADC with only 13 of D-FFs. The linearity of A/D Converter due to the jitter of PLL or DLL and the process variation., The Institute of Image Information and Television Engineers, Japanese
  • Meta-Stability Characteristic of Single-Slope ADC with Time to Digital Convertor for CMOS-Image Sensor
    SHIN Mhun; IKEBE Masayuki; MOTOHISA Junichi; SANO Eiichi, IEICE technical report, 109, 214, 75, 80, 24 Sep. 2009
    We have proposed the method of re-measuring quantizing error of Single-Slope ADC for CMOS imager with TDC (Time-to-Digital Converter). Here, we examined adding TDC by D-FF with multi-phase clock, vis-a-vis Delay-line TDC with CMOS inverters. For the operation at 200MHz using 0.25um process, we verified to compensate the process variation of process within 8%, and to operate TDC in DNL: ±0.25LSB, INL: ±0.4LSB by simulation. In addition, utilizing deformation thermo-code, we reduced D-FFs of TDC. For 12bit A/D Converter, when the first stage 9bit ADC and the second stage 3bit TDC are considered, we can design the proposed ADC with only 13 of D-FFs. The linearity of A/D Converter due to the jitter of PLL or DLL and the process variation., The Institute of Electronics, Information and Communication Engineers, Japanese
  • A-1-25 Analog to Digital Converter with Multi-Phase Clock for CMOS Imager
    Shin Muung; Ikebe Masayuki; Makihara Yukinobu; Motohisa Junichi; Sano Eiichi, Proceedings of the Society Conference of IEICE, 2009, 25, 25, 01 Sep. 2009
    The Institute of Electronics, Information and Communication Engineers, Japanese
  • C-2-21 Evaluation of the method of bandwidth-enhancement adapted to the characteristics of On-Chip Antenna for a Low Noise Amplifier
    Oono Masaki; Ikebe Masayuki; Motohisa Junichi; Sano Eiichi, Proceedings of the IEICE General Conference, 2009, 1, 60, 60, 04 Mar. 2009
    The Institute of Electronics, Information and Communication Engineers, Japanese
  • C-2-18 Effect of Quality Factor of Resonant Inductors to the Wide Band Quadrature Mixers
    Takada Yusuke; Ikebe Masayuki; Motohisa Junichi; Sano Eiichi, Proceedings of the IEICE General Conference, 2009, 1, 57, 57, 04 Mar. 2009
    The Institute of Electronics, Information and Communication Engineers, Japanese
  • C-12-47 Influence of Phase Noise from Oscillator for Clock-Period comparison PLL
    Makihara Yukinobu; Ikebe Masayuki; Motohisa Junichi; Sano Eiichi, Proceedings of the IEICE General Conference, 2009, 2, 135, 135, 04 Mar. 2009
    The Institute of Electronics, Information and Communication Engineers, Japanese
  • D-11-89 High Speed and High Quality Processing for Local Dynamic-Range-Compression Method
    Shimoyama Sohsuke; Igarashi Masaki; Ikebe Masayuki; Motohisa Junichi, Proceedings of the IEICE General Conference, 2009, 2, 89, 89, 04 Mar. 2009
    The Institute of Electronics, Information and Communication Engineers, Japanese
  • A-1-50 A high resolution Time-to-Digital Converter with State Hold in Delay-Lines
    Yamamoto Takurou; Ikebe Masayuki; Motohisa Junichi; Sano Eiichi, Proceedings of the IEICE General Conference, 2009, 50, 50, 04 Mar. 2009
    The Institute of Electronics, Information and Communication Engineers, Japanese
  • Structural transition of InP nanowires grown by selective-area metalorganic vapor phase epitaxy
    KITAUCHI Yusuke; MOTOHISA Junichi; KOBAYASHI Yasunori; FUKUI Takashi, IEICE technical report, 108, 437, 19, 22, 19 Feb. 2009
    Recently, semiconductor nanowires have attracted much interest because of their unique properties. However, most of the nanowires have rotational twins or stacking faults, which might degrade their quality. In addition, they could exhibit crystal structures which are different from those in the bulk phase. Thus, it is important to clarify the formation mechanisms of defects and to control crystal structures. In this report, we describe the growth of InP nanowires by selective-area metalorganic vapor phase epitaxy (SA-MOVPE) and show that they shows both zincblende and wurtzite structure depending on the growth conditions., The Institute of Electronics, Information and Communication Engineers, Japanese
  • 半導体B(探索的材料・物性・デバイス)
    本久 順一, 應用物理, 78, 1, 77, 78, 10 Jan. 2009
    Japanese
  • 熱ナノインプリントを利用した微細加工に関する検討
    井上理樹; 佐藤拓也; 池辺将之; 福井孝志; 本久順一, 応用物理学会北海道支部・日本光学会北海道地区合同学術講演会講演予稿集, 44th-5th, 2009
  • 高精度周期比較器を用いたループ特性に依存しないデジタル制御PLLの検討と試作(アナログ,アナデジ混載,RF及びセンサインタフェース回路)
    牧原 幸伸; 池辺 将之; 本久 順一; 佐野 栄一, 映像情報メディア学会技術報告, 32, 45, 165, 170, 22 Oct. 2008
    本研究では,周期比較方式を用いた位相同期回路(Phase Locked Loop: PLL)の新規アーキテクチャを提案する.周期比較器を導入する事により,ループ・フィルタの特性に依存しない位相ロック動作を確認することができた.通常,周期比較のみでは位相ロック動作は得られない.提案型PLLは厳密な周期の大小比較により,符号の変わる微小な周期差が位相差を制御し位相ロック動作が得られる.提案型PLLを0.25μm CMOSプロセスで回路設計し,その動作をシミュレーションで確認した.回路設計の際導入した,デジタル制御発振器の特性改善も行った.また動作確認のため試作を行い,測定により位相同期を確認した., 一般社団法人映像情報メディア学会, Japanese
  • Selective-area growth of hexagonal nanopillars with single InGaAs/GaAs quantum wells on GaAs(111)B substrate and their temperature-dependent photoluminescence (vol 18, artn 105302, 2008)
    Lin Yang; Junichi Motohisa; Junichiro Takeda; Katsuhiro Tomioka; Takashi Fukui, NANOTECHNOLOGY, 19, 40, Oct. 2008
    English, Others
  • C-2-3 Study on the Wide Band Quadrature Mixers for MB-OFDM
    Takada Yusuke; Ikebe Masayuki; Motohisa Junichi; Sano Eiichi, Proceedings of the Society Conference of IEICE, 2008, 1, 28, 28, 02 Sep. 2008
    The Institute of Electronics, Information and Communication Engineers, Japanese
  • III-V Semiconductor Epitaxial Nanowires and Their Applications
    FUKUI Takashi; HARA Shinjiro; HIRUMA Kenji; MOTOHISA Junichi, Technical report of IEICE. SDM, 108, 122, 1, 1, 02 Jul. 2008
    III-V semiconductor nanowires were grown by selective area metalorganic vapor phase epitaxy on (111) oriented substrate. Here, we discus uniform growth of nanowire array and their optical transport device applications., The Institute of Electronics, Information and Communication Engineers, English
  • C-12-12 Adoption of Fine Clock Period Comparator for All Digital PLL
    Makihara Yukinobu; Ikebe Masayuki; Motohisa Junichi; Sano Eiichi, Proceedings of the IEICE General Conference, 2008, 2, 102, 102, 05 Mar. 2008
    The Institute of Electronics, Information and Communication Engineers, Japanese
  • A-1-4 A Time-to-Digital Converter with State Hold in Delay-Lines
    Yamamoto Takurou; Ikebe Masayuki; Motohisa Junichi; Sano Eiichi, Proceedings of the IEICE General Conference, 2008, 4, 4, 05 Mar. 2008
    The Institute of Electronics, Information and Communication Engineers, Japanese
  • D-11-24 Evaluation of High Speed and High Quality Dynamic-Range-Compression Method Using Local Histogram Equalization
    Shimoyama Sohsuke; Igarashi Masaki; Ikebe Masayuki; Motohisa Junichi, Proceedings of the IEICE General Conference, 2008, 2, 24, 24, 05 Mar. 2008
    The Institute of Electronics, Information and Communication Engineers, Japanese
  • 25pWJ-7 Transient processes of photo-excited carriers in InP/InAs/InP Core-Multishell nanowires
    Goto K.; Tomimoto S.; Pal B.; Masumoto Y.; Mohan P.; Motohisa J.; Fukui T., Meeting abstracts of the Physical Society of Japan, 63, 1, 683, 683, 29 Feb. 2008
    The Physical Society of Japan (JPS), Japanese
  • Delay-Lineで記憶保持を行うTime-to-Digital Converterの提案
    山本拓良; 池辺将之; 本久順一; 佐野栄一, 電子情報通信学会大会講演論文集, 2008, 2008
  • Type-II behavior in wurtzite InP/InAs/InP core-multishell nanowires
    Pal B.; Goto K.; Ikezawa M.; Masumoto Y.; Mohan P.; Motohisa J.; Fukui T., Applied Physics Letters, 93, 7, 073105, 73105, 2008
    We study optical transitions from a periodic array of InP/InAs/InP core-multishell nanowires (CMNs) having a wurtzite crystal structure by using photoluminescence (PL) and PL excitation (PLE) spectroscopy. Observing a large Stokes shift between PL and PLE spectra, a blueshift of the PL peak with a cube-root dependence on the excitation power and a slow and nonexponential decay of PL with an effective decay time of 16 ns suggest a type-II band alignment. Band-offset calculation based on the "model-solid theory" of Van de Walle [Phys. Rev. B 39, 1871 (1989)] supports type-II band lineup if the InAs layer in the wurtzite CMNs is assumed to sustain compressive strain in all directions., American Institute of Physics, English
  • III-V semiconductor hetero-structure nanowires by selective area MOVPE
    FUKUI Takashi; HARA Shinjiro; MOTOHISA Junichi, Extended abstracts of the ... Conference on Solid State Devices and Materials, 2007, 810, 811, 19 Sep. 2007
    English
  • 21pTG-6 Exciton processes in InP/InAs/InP Core-Multishell nanowires
    Goto K.; Pal B.; Masumoto Y.; Mohan P.; Motohisa J.; Fukui T., Meeting abstracts of the Physical Society of Japan, 62, 2, 681, 681, 21 Aug. 2007
    The Physical Society of Japan (JPS), Japanese
  • 18pTA-5 Time Resolved PL Spectra of InP/InAs/InP Core-Multishell Nanowires II
    Goto K.; Pal B.; Masumoto Y.; Mohan P.; Motohisa J.; Fukui T., Meeting abstracts of the Physical Society of Japan, 62, 1, 661, 661, 28 Feb. 2007
    The Physical Society of Japan (JPS), Japanese
  • Evaluation of a Method for Extending Dynamic-Range of a CMOS-Image Sensor and the Behavior Control
    池辺将之; 櫻谷直史; 五十嵐正樹; 本久順一, 映像情報メディア学会技術報告, 31, 50(IST2007 86-93), 2007
  • 24aXL-2 Optical detection of the Aharonov-Bohm effect in quantum tubes
    Tsumura K.; Nomura S.; Motohisa J.; Fukui T., Meeting abstracts of the Physical Society of Japan, 61, 2, 536, 536, 18 Aug. 2006
    The Physical Society of Japan (JPS), Japanese
  • 24aXL-7 Time Resolved PL Spectra of InP/InAs/InP Core-Multishell Nanowires
    Goto K.; Pal B.; Masumoto Y.; Mohan P.; Motohisa J.; Fukui T., Meeting abstracts of the Physical Society of Japan, 61, 2, 537, 537, 18 Aug. 2006
    The Physical Society of Japan (JPS), Japanese
  • Invited: Growth and Properties of Semiconductor Nanowires by Selective-Area Metalorganic Vapor Phase Epitaxy (AWAD2006)
    MOTOHISA Junichi; FUKUI Takashi, IEICE technical report, 106, 137, 63, 68, 03 Jul. 2006
    We describe our recent results on the formation of III-V semiconductor nanowires and related nanostructures utilizing selective-area metalorganic vapor phase epitaxial (SA-MOVPE) growth. Array of vertically aligned nanowires are grown on partially masked GaAs and InP substrate along the [111]B or [111]A directions, respectively. The alignment and size of the nanowires are controlled by the mask patterning as well as growth conditions. Nanowires containing heterostructures in their radial direction have also been realized by controlling the growth mode during SA-MOVPE. Their optical and transport properties are also investigated and described., The Institute of Electronics, Information and Communication Engineers, English
  • GaAs DH-HEMT channel coupled InAs quantum dot memory device by selective area metal organic vapor phase epitaxy
    NATARAJ Devaraj; OOIKE Noboru; MOTOHISA Junichi; FUKUI Takashi, Extended abstracts of the ... Conference on Solid State Devices and Materials, 2005, 154, 155, 13 Sep. 2005
    English
  • Fabrication of InP and InGaAs air-hole type Two-dimensional Photonic Crystals by Selective Area MOVPE
    HASHIMOTO S.; TAKEDA J.; TARUMI A.; HARA S.; MOTOHISA J.; FUKUI T., Extended abstracts of the ... Conference on Solid State Devices and Materials, 2005, 762, 763, 13 Sep. 2005
    English
  • Fabrication of InP-based Air-hole Type Two Dimensional Photonic Crystals
    TARUMI Akihiro; TAKEDA Junichiro; HASHIMOTO Shinji; MOTOHISA Junichi; FUKUI Takashi, IEICE technical report. Electron devices, 104, 623, 1, 4, 28 Jan. 2005
    Photonic Crystals (PhCs), which have periodically modulated dielectric structures near light wavelength, can control spontaneous emission of light utilizing photonic band gap, so they have received much attention as a new optical devices. In this paper, we report on the fabrication of InP and InGaAs air-hole type 2D PhCs structures on InP substrates by using selective area metal organic vapor phase epitaxy (SA-MOVPE) for application to InP-based air-hole type 2D PhCs., The Institute of Electronics, Information and Communication Engineers, Japanese
  • Fabrication of wire transistor with self-aligned gate by selective area MOVPE
    OOIKE N.; MOTOHISA J.; FUKUI T., IEICE technical report. Electron devices, 104, 622, 1, 6, 20 Jan. 2005
    We have fabricated GaAs/AlGaAs Field Effect Transistor (FETs) having a narrow wire channel and a self-aligned tungsten (W) gate electrode by using Selective-Area Metal Organic Vapor Epitaxy (SA-MOVPE). Stacked film of SiO_2/W was used as a mask for SA-MOVPE. In case that the structure in cross-section fabricated by SA-MOVPE is mesa-shape, the distance between bottom W-gate electrode on the substrate and channel layer become far, as the channel layer forms at a higher position of the mesa structure. So that, we fabricated wire structures with different structural parameters, for example channel-gate distance or channel width, and demonstrated relation of gate-control and their structural parameters. As a result, we obtained that the gate-control depended only on channel width. From these results, we will discuss operation mode of the narrow wire-transistor having self-aligned W gate., The Institute of Electronics, Information and Communication Engineers, Japanese
  • Theoretical study on the photonic crystal slabs with hexagonal optical atoms
    YANG Lin; MOTOHISA Junichi; FUKUI Takashi, Extended abstracts of the ... Conference on Solid State Devices and Materials, 2004, 558, 559, 15 Sep. 2004
    English
  • Growth and Optical Characterization of GaInAs/GaAs Nano-Wires Grown by SA-MOVPE
    HARA Shinjiroh; MOTOHISA Junichi; TAKEDA Junichiro; NOBORISAKA Jinichiro; FUKUI Takashi, Journal of the Japanese Association of Crystal Growth, 31, 3, 167, 167, 25 Aug. 2004
    We demonstrated formation of hexagonal nano-wires with GaInAs/GaAs double hetero-structures using SA-MOVPE growth on SiO_2 masked (111)B GaAs substrates with periodic round openings. Using μ-PL measurements, PL emission from single GaInAs/GaAs hexagonal nano-wire was successfully identified. These results indicated that GaInAs/GaAs hexagonal nano-wires had good crystal qualities., The Japanese Association for Crystal Growth (JACG), Japanese
  • Fabrication of InP-based Photonic Crystals Utilizing Selective-Area MOVPE
    MOTOHISA Junichi; FUKUI Takashi, Journal of the Japanese Association of Crystal Growth, 31, 3, 243, 243, 25 Aug. 2004
    We report on the fabrication of periodic structures of InGaAs and InP on InP (111)A- or (111)B-oriented substrates by using selective-area (SA) MOVPE for the application of photonic crystals (PhCs). Array of hexagonal InGaAs and InP pillars are formed on masked substrates with circular mask openings at appropriate growth conditions. Air-hole arrays with InGaAs are also grown on substrates with periodic array of hexagonal masks., The Japanese Association for Crystal Growth (JACG), Japanese
  • Fabrication of InP-based Two Dimensional Photonic Crystal Structures by Using Selective Area MOVPE
    INARI Masaru; TAKEDA Junichiro; MOTOHISA Junichi; FUKUI Takashi, Technical report of IEICE. SDM, 103, 631, 47, 50, 23 Jan. 2004
    Photonic crystals (PCs) have received much attention as a new class of optical materials. PCs are modulated dielectric structures whose period is near the light wavelength, enabling us to control spontaneous emission and propagation of lightwaves using photonic band gaps. In particular, high aspect ratio, smooth surface, and high uniformity are required to achieve two-dimensional PCs (2DPCs). In this paper, we report on the fabrication of InP pillar structures on InP substrates by using selective area metal organic vapor phase epitaxy (SA-MOVPE) for application to InP-based 2DPCs., The Institute of Electronics, Information and Communication Engineers, Japanese
  • Fabrication and low-temperature transport properties of selectively grown dual-gated single-electron transistors
    J Motohisa; F Nakajima; T Fukui; WG van der Wiel; JM Elzerman; S De Franceschi; LP Kouwenhoven, APPLIED PHYSICS LETTERS, 80, 15, 2797, 2799, Apr. 2002
    English
  • Fabrication of InGaAs quantum dots formation along GaAs multiatomic steps
    ISHIHARA T.; AKABORI M.; MOTOHISA J.; FUKUI T., IEICE technical report. Electron devices, 101, 617, 29, 34, 21 Jan. 2002
    The uniform and self-aligned S-K mode InGaAs quantum dots were formed on GaAs multiatomic steps on (001) vicinal surface by MOVPE. Under optimum In content (x=O.8) and InGaAs layer thickness (3.2ML) condition highly uniform InGaAs quantum dots were obtained. The size distribution of InGaAs dots depends on GaAs multiatomic step width strongly. The misorientation angle dependence on the formation of InGaAs quantum dots on GaAs multiatomic steps were also observed by AFM and PL. The results of PL measurement agreed well with AFM results., The Institute of Electronics, Information and Communication Engineers, Japanese
  • Fabrication of Quantum Nanostructures by Selective Area MOVPE and Their Device Application : Fabrication of Quantum Nanostructures and Their Device Application
    MOTOHISA Junichi; NAKAJIMA Fumito; AKABORI Masashi; FUKUI Takashi, IEICE technical report. Electron devices, 101, 617, 1, 8, 21 Jan. 2002
    We report on the formation of quantum nanostructures and their arrays by selective area metalorganic vapor phase epitaxy (SA-MOVPE) on masked substrates and their application to quantum devices and circuits. With appropriately designed masked substrates, various kinds of nanostructures, such as quantum dot-quantum wire coupled structure arrays are realized. When SA-MOVPE is carried out on (111) B substrates, triangular lattice arrays of hexagonal air holes or pillars consisting of {110} facet sidewalls can be formed, which can be used for photonic crystals. For device application of such nanostructures, we fabricate single electron transistors in combination with lithographically defined dual gated structures, in which clear Coulomb oscillations and Coulomb diamonds are observed. Applications to logic circuits using single electron transistors are also described., The Institute of Electronics, Information and Communication Engineers, Japanese
  • Formation of InAs Dots on AlGaAs Ridge Wires Structure by Selective Area MOVPE Growth
    KUSUHARA Toyonori; NAKAJIMA Fumito; MOTOHISA Junichi; FUKUI Takashi, Extended abstracts of the ... Conference on Solid State Devices and Materials, 2001, 330, 331, 25 Sep. 2001
    English
  • Fabrication and characterization of periodic multiatomic step structures on patterned vicinal substrates and its applications
    ODA Yasuhiro; HARADA Toshifumi; MOTOHISA Junichi; FUKUI Takashi, IEICE technical report. Electron devices, 100, 641, 9, 16, 21 Feb. 2001
    We developed a method to fabricate various kind of semiconductor nano-structures using self-organized method in MOVPE crystal growth on patterned GaAs(001) vicinal substrates Periodic mutiatomic step structures are formed on the patterned vicinal substrate misoriented towards the [-110] direction with a line & space pattern along the [11] direction. In A crossed line & space pattern, square scale structures can be formed with crossed multiatomic steps. We found that growth rate was different between step edges and terrace regions on the surface of these structures. These results demonstrated that it is possible to fabricate various kind of quantum structures with controllability of periodicity., The Institute of Electronics, Information and Communication Engineers, Japanese
  • Initial Stage of InGaAs Growth on GaAs Multiatomic Steps by MOVPE
    LEE Sangyoru; AKABORI Masashi; SHIRAHATA Takahiro; MOTOHISA Junichi; FUKUI Takashi, Extended abstracts of the ... Conference on Solid State Devices and Materials, 2000, 512, 513, 28 Aug. 2000
    English
  • Lateral Thickness Modulation of InGaAs/GaAs Structures by Selective Area MOVPE
    TERASAWA T.; NAKAJIMA F.; MOTOHISA J.; FUKUI T., Extended abstracts of the ... Conference on Solid State Devices and Materials, 2000, 504, 505, 28 Aug. 2000
    English
  • Fabrication of Single-Electron Devices by Selective Area MOVPE and Their Applications to Single-Electron Circuits
    NAKAJIMA F.; MOTOHISA J.; FUKUI T., Technical report of IEICE. SDM, 99, 617, 1, 6, 09 Feb. 2000
    We fabricated single electron devices by using selective area MOVPE and investigated their transport properties. GaAs/AlGaAs modulation doped heterostructures are grown on a GaAs (001) substrate partially masked with SiNx and narrow channel surrounded by facet sidewalls are formed near the top. The width of the channel is modulated by an appropriate patterning of the mask. By applying negative biases to a gate, a quantum dot connected with quantum wires through tunnel barriers are formed near the pinch-off voltage, as a result of the expansion of depletion layers. We successfully observed clear Coulomb blockade oscillations at low temperatures. We also fabricate logic circuits with an SET and a variable load resistance, and confirmed inverter operations., The Institute of Electronics, Information and Communication Engineers, Japanese
  • Temperature Dependence of Si Delta-Doping on GaAs Singular and Vicinal Surfaces in Metalorganic Vapor Phase Epitaxy
    TAZAKI Chiharu; AKABORI Masashi; MOTOHISA Junichi; FUKUI Takashi, Extended abstracts of the ... Conference on Solid State Devices and Materials, 1999, 546, 547, 20 Sep. 1999
    English
  • Characterization of Potential Modulation in Novel Lateral Surface Superlattices Formed on GaAs Multiatomic Steps
    YAMATANI Kazuki; AKABORI Masashi; MOTOHISA Junichi; FUKUI Takashi, Extended abstracts of the ... Conference on Solid State Devices and Materials, 1998, 330, 331, 07 Sep. 1998
    English
  • Transport characterization of GaAs quantum dots connected with quantum wires fabricated by selective area metalorganic vapor phase epitaxy
    K Kumakura; J Motohisa; T Fukui, SOLID-STATE ELECTRONICS, 42, 7-8, 1227, 1231, Jul. 1998
    English
  • Delta-Doping of Si on GaAs Vicinal Surfaces and Its Possibility of Wirelike Incorporation in Metalorganic Vapor Phase Epitaxial Growth
    IRISAWA Tomoki; MOTOHISA Junichi; AKABORI Masashi; FUKUI Takashi, Extended abstracts of the ... Conference on Solid State Devices and Materials, 1997, 326, 327, 16 Sep. 1997
    English
  • Possibility of Selective Doping of Si on Vicinal GaAs Substrates by MOVPE
    IRISAWA T.; MOTOHISA J.; AKABORI M.; FUKUI T., Journal of the Japanese Association of Crystal Growth, 24, 2, 234, 234, 01 Jul. 1997
    We have investigated the possibility of selcctive incorporation of Si into step edges of GaAs vicinal surfaces to form doping quantum wircs. It has shown that the selective incorporation actually take place particularly at the initial stage of the doping., The Japanese Association for Crystal Growth (JACG), Japanese
  • AFM Characterization of Quantum Wire and Quantum Dot Structures
    Fukui T; Ishizaki J.; Hara S; Kumakura K.; Motohisa J., Abstracts of the meeting of the Physical Society of Japan. Sectional meeting, 1996, 2, 145, 146, 13 Sep. 1996
    The Physical Society of Japan (JPS), Japanese
  • A Novel Electron Wave Interference Device Using Multiatomic Steps on Vicinal GaAs Surfaces Grown by MOVPE : Investigation of Transport Properties
    AKABORI Masashi; MOTOHISA Junichi; IRISAWA Tomoki; HARA Shinjiroh; ISHIZAKI Jun-ya; OHKURI Kazunobu; FUKUI Takashi, Extended abstracts of the ... Conference on Solid State Devices and Materials, 1996, 706, 708, 26 Aug. 1996
    English
  • MOVPE選択成長における自己停止機構を利用した量子箱構造の作製と評価
    中越 一彰; 熊倉 一英; 佐久間 誠; 本久 順一; 福井 孝志, 電気学会研究会資料. EFM, 電子材料研究会, 1995, 1, 85, 93, 13 Nov. 1995
    Japanese
  • MULTIATOMIC STEP FORMATION MECHANISM OF METALORGANIC VAPOR-PHASE EPITAXIAL GROWN GAAS VICINAL SURFACES AND ITS APPLICATION TO QUANTUM-WELL WIRES
    T FUKUI; J ISHIZAKI; S HARA; J MOTOHISA; H HASEGAWA, JOURNAL OF CRYSTAL GROWTH, 146, 1-4, 183, 187, Jan. 1995
    English
  • Fabrication and Characterization of GaAs and AlGaAs Micro-Pyramids by Selective MOCVD
    岸田 基也; 熊倉 一英; 中越 一彰; 山崎 高宏; 本久 順一; 福井 孝志; 長谷川 英機, Bulletin of the Faculty of Engineering,Hokkaido University, 170, p27, 33, Jul. 1994
    北海道大学 = Hokkaido University, Japanese
  • FORMATION OF N-ALGAAS/GAAS EDGE QUANTUM-WIRE ON (111)B MICRO FACET BY MBE AND MAGNETIC DEPOPULATION OF QUASI-ONE-DIMENSIONAL ELECTRON-GAS
    Y NAKAMURA; M TSUCHIYA; J MOTOHISA; H NOGE; S KOSHIBA; H SAKAKI, SOLID-STATE ELECTRONICS, 37, 4-6, 571, 573, Apr. 1994, [Peer-reviewed]
    English
  • ATOMIC-SCALE UNDERSTANDING AND CONTROLLABILITY OF HETEROINTERFACES IN QUANTUM MICROSTRUCTURES
    H SAKAKI; T NODA; M TANAKA; J MOTOHISA; Y KADOYA; N IKARASHI, SEMICONDUCTOR INTERFACES AT THE SUB-NANOMETER SCALE, 243, 217, 230, 1993
    English
  • INTERSUBBAND TRANSITION AND ELECTRON-TRANSPORT IN POTENTIAL-INSERTED QUANTUM-WELL STRUCTURES AND THEIR POTENTIALS FOR INFRARED PHOTODETECTOR
    H SAKAKI; H SUGAWARA; J MOTOHISA; T NODA, INTERSUBBAND TRANSITIONS IN QUANTUM WELLS, 288, 65, 72, 1992
    English
■ Books and other publications
■ Lectures, oral presentations, etc.
■ Syllabus
  • 情報エレクトロニクス特別演習, 2024年, 修士課程, 情報科学院
  • 半導体デバイス物理学特論, 2024年, 修士課程, 情報科学院
  • 情報エレクトロニクス特別研究, 2024年, 博士後期課程, 情報科学院
  • 半導体デバイス物理学特論, 2024年, 博士後期課程, 情報科学院
  • 量子デバイス学特論, 2024年, 博士後期課程, 情報科学研究科
  • 科学・技術の世界(1単位), 2024年, 学士課程, 全学教育
  • 科学・技術の世界(1単位), 2024年, 学士課程, 全学教育
  • 情報エレクトロニクス概論, 2024年, 学士課程, 工学部
  • 電気電子工学実験Ⅳ, 2024年, 学士課程, 工学部
  • 電気電子工学実験Ⅴ, 2024年, 学士課程, 工学部
  • 卒業論文, 2024年, 学士課程, 工学部
  • 科学技術英語演習, 2024年, 学士課程, 工学部
  • 電気エネルギー工学, 2024年, 学士課程, 工学部
  • 電気電子工学演習Ⅲ, 2024年, 学士課程, 工学部
■ Research Themes
  • Near to Middle Infrared Photodetector Utilizing Core-Shell Semiconductor Nanowires
    Grants-in-Aid for Scientific Research
    01 Apr. 2025 - 31 Mar. 2028
    本久 順一; 冨岡 克広
    Japan Society for the Promotion of Science, Grant-in-Aid for Scientific Research (B), Hokkaido University, 25K01256
  • Development of nanowire hybrid integrated devices
    Grants-in-Aid for Scientific Research
    01 Apr. 2022 - 31 Mar. 2026
    冨岡 克広; 池辺 将之; 本久 順一
    Japan Society for the Promotion of Science, Grant-in-Aid for Scientific Research (A), Hokkaido University, 22H00202
  • Development of vertical HEMT-type devices using Si-Ge core-shell heterojunction nanowires
    Grants-in-Aid for Scientific Research
    05 Apr. 2021 - 31 Mar. 2025
    深田 直樹; J. Wipakorn; 宮崎 剛; 本久 順一; 冨岡 克広; 松村 亮
    現行の平面型金属・酸化膜・半導体電界効果型トランジスタ(MOSFET)では、微細化した回路素子からのリーク電流による発熱が大きくなるため、従来のスケール則に従った微細化だけでは素子の性能向上に限界が指摘されている。本研究では、IV族半導体Si、Ge、新規高移動度材料として注目されているGeSnから形成される特殊なコアシェルヘテロ接合により高電子移動度型トランジスタ(HEMT)構造を1次元ナノワイヤ内部に形成することで、次世代トランジスタの微細化限界・低消費電力化の課題を解決し、ナノ構造でも不純物散乱のない高移動度デバイスを実現する。
    初年度はサイズ・配列制御可能で、大面積での繰り返しパターン形成が容易で時間短縮できるナノインプリント法と反応性イオンエッチング(RIE)法を適用し、i(intrinsic)-Ge/p-Si、逆構造であるp-Si/i-Geおよびp-Si/i-Ge1-xSnxコアシェルナノワイヤ中のコア領域のp-Siおよびi-Geナノワイヤアレイの形成を行った。RIEの条件をSiとGeで最適化することで、直径150nmのi-Geおよびp-Siナノワイヤアレイのサイズ・配列制御に成功した。RIEではナノワイヤ表面にダメージが導入される。そこで、表面ダメージ層を低温オゾン酸化とエッチングで除去し、ナノワイヤ径を高速チャネルのサイズとして利用できる50nmまで縮小化することに成功した。ナノワイヤFET形成のためのプロセスおよび大規模第一原理計算によるコアシェルナノワイヤモデルの構築を行った。
    Japan Society for the Promotion of Science, Grant-in-Aid for Scientific Research (A), National Institute for Materials Science, 21H04642
  • Generation of Vector Beams using Semiconductor Nanowires
    Grants-in-Aid for Scientific Research
    01 Apr. 2020 - 31 Mar. 2023
    本久 順一; 冨岡 克広
    令和3年度は、有機金属気相選択成長法により作製したGaAs/InGaAs/GaAs コアマルチシェル構造ナノワイヤの発光特性について前年度に引き続いて評価を行った。特に発光により得られたビームの形状、およびその偏光状態の詳細評価を行い、ナノワイヤがレーザ発振した場合に、ベクトル光波が放出されていることを確認した。具体的には、まず、試料を低温でパルス光励起した場合、半値幅の狭い発光ピークが複数観測され、そしてその強度が励起光強度とともに非線形的に増大することが明らかとなった。これによりナノワイヤのレーザ発振の兆候が確認されたが、この時得られた発光像を観測したところ、中心部の強度が弱い、ドーナツ形状となっていることが確認された。そして、そのピーク近傍のスペクトルをバンドパスフィルターで切り出し、その偏光状態を解析したところ、ビームの広がりの範囲内で、軸対称の偏光分布となっていることを確認した。これらの結果より、観測されたナノワイヤから放射されたビームは、中心に特異点を含むベクトル光波となっており、ナノワイヤが期待どおりWGM型のベクトル光波源として機能することが示された。また、得られた実験結果をさらに詳細に検討したところ、低次のベクトル光波であるTEモードやTMモードを反映した偏光分布ではなく、高次のベクトル光波が得られている可能性が示唆された。そして、このような明瞭な軸対称の偏光分布、特に特異点はナノワイヤがレーザ発振している場合にのみ得られ、連続光励起の時に観測されていたナノワイヤの共振モードに起因する発光ピークに対しては得られていないことから、連続光およびパルス光励起の元で得られる発光ピークの起源となるモードは異なること、および基本モードではナノワイヤはレーザ発振していないと判断される。
    Japan Society for the Promotion of Science, Grant-in-Aid for Scientific Research (B), Hokkaido University, 20H02176
  • Inverstigation on vertical tunnel FET using Si/III-V heterojunction and their three-dimensional integrated circuit applications
    Grants-in-Aid for Scientific Research
    01 Apr. 2019 - 31 Mar. 2022
    Tomioka Katsuhiro
    In this research, we developed and explored heterogeneous integration of III-V nanowires heterogeneous for high-speed, low-power, and high-efficiency three-dimensional (3D) circuits application. a nanowire 3D-architecture revolutionized the existing planar integration paradigm, and created a new trend in next-generation electronics. We have created an ultra-efficient tunnel transistors driven by nanowatts based on a new Si/III-V nanowire junction and tunneling transport mechanism. These results would provided new design guidelines for three-dimensional circuit structures based on nanowire TFETs.
    Japan Society for the Promotion of Science, Grant-in-Aid for Scientific Research (B), Hokkaido University, 19H02184
  • Study on the fabrication of Vertical FETs using GaN-Based Singular Nanostructures and Their Novel Characterization Method
    Grants-in-Aid for Scientific Research
    01 Apr. 2019 - 31 Mar. 2021
    本久 順一
    (1) 前年度実施したコンタクトレス光支援電気化学エッチング(PEC)およびアルカリ溶液処理によるGaNナノワイヤの形成法についてさらなる検討を行った。PECエッチング時間に対するエッチング深さの変化を評価したところ、エッチング時間が増えると、エッチング時間とエッチング深さの関係に線形性が失なわれるとともに、表面平坦性が劣化することが明らかとなった。さらに、その後のアルカリ溶液処理によりGaNナノワイヤの微細化および側面ラフネスの除去は可能であるが、現在の処理条件では長時間のPECエッチングよって発生したエッチング表面の非平坦性は改善しないという結果が得られた。
    (2) 古典的1次元ナノワイヤMOSFETのモデルおよび1次元の弾道的輸送モデルにもとづき、InAsおよびGaNナノワイヤトランジスタの性能予測を行った。ナノワイヤ一周の寸法により規格化したオフ電流の密度が一定という条件のもとナノワイヤ寸法によるトランジスタの特性を比較したところ、いずれのモデルにおいても、オン電流密度がナノワイヤ直径の微細化ともに増大するという結果が得られた。これにより、ナノワイヤのような微細構造を有するトランジスタであっても、ナノワイヤ寸法を適切に制御し、またナノワイヤ密度を十分高くすることができれば(例えばナノワイヤの占有面積25%以上)ならば、大電流を制御する上では通常の縦型トランジスタよりも優位となる可能性のあること、よって、ナノワイヤの特徴である短チャネル効果耐性も考慮し、ナノワイヤ縦型トランジスタがパワーエレクトロニクス応用にも十分耐えられる可能性を示した。
    (3) RF支援分子線エピタキシャル(RF-MBE)法を用いた選択成長法によるGaNナノワイヤの形成を確認した。高さ約0.3 μm、断面寸法120 nmのGaNナノワイヤアレイを得ることができた。
    Japan Society for the Promotion of Science, Grant-in-Aid for Scientific Research on Innovative Areas (Research in a proposed research area), Hokkaido University, 19H04528
  • Low-damage Processing of Nitride Semiconductors Based on Self-stoping Oxdization and Transistor Applications
    Grants-in-Aid for Scientific Research
    01 Apr. 2017 - 31 Mar. 2020
    Sato Taketomo
    The photo-electrochemical (PEC) process was developed for fabricating recessed-gate AlGaN/GaN high-electron-mobility transistors (HEMTs). The photo-carriers generated in the top AlGaN layer caused homogeneous etching of AlGaN with a smooth surface. Self-termination phenomena observed under optimal PEC condition were useful for precisely controlling the etching depth in the AlGaN layer. Two types of HEMTs, i.e., Schottky-gate and metal-insulator-semiconductor (MIS)-gate, were fabricated. A recessed-gate AlGaN/GaN structure fabricated with PEC etching showed positive threshold voltage, and its variation was very small. A recessed-gate structure with PEC etching showed better current transport controllability with a small subthreshold-slope than that of planar-gate and dry-etched-gate AlGaN/GaN structures.
    Japan Society for the Promotion of Science, Grant-in-Aid for Scientific Research (B), Hokkaido University, 17H03224
  • Study on Light-Emittind Devices on Si Substrates based on Semiconductor Nanowires
    Grants-in-Aid for Scientific Research
    01 Apr. 2017 - 31 Mar. 2020
    Motohisa Junichi
    We attempted the growth of InGaAs nanowires (NWs) on Si substrates by selective-area metalorganic vapor-phase epitaxy. By controlling the supply ratio of source materials of group III atoms, emission from InGaAs NW arrays in the telecommunication bands were successfully confirmed by the low-temperature photoluminescence measurement. InGaAs NW arrays with a vertical pn junction are also fabricated and photocurrent spectroscopy reveals that fabricated NW array exhibited optical bandgap in the telecommunication bands. Emission mechanism of InP-based light-emitting diode (LED) was investigated and radiative tunneling was the dominant emission mechanism in the NW-LEDs. Control of the emission wavelength and size of InAsP quantum dots embedded in InP NWs were attempted and emission from the telecommunication band was demonstrated. NW-LEDs utilizing InAsP/InP heterostructure NWs were also fabricated and confirmed the light emission in the near-infrared regions originating from InAsP layer.
    Japan Society for the Promotion of Science, Grant-in-Aid for Scientific Research (B), Hokkaido University, 17H03223
  • Bottom-Up Integration of Vertical Nanowire Spin-Transistors on Silicon
    Grants-in-Aid for Scientific Research
    01 Apr. 2017 - 31 Mar. 2020
    Hara Shinjiro
    The purpose of this study is to create and integrate vertical nanowire-spin-transistors, in which vertical semiconductor nanowires (NWs) are used with magnetic tunnel junction (MTJ) electrodes, on semiconducting substrates, e.g., Si. Such vertical NW-spin-transistors are realized using free-standing NWs with a high aspect ratio fabricated by our bottom-up-type formation method in a reproducible manner in terms of a location and size of NWs on substrates. We succeeded in obtaining some experimental results mainly relating to quasi-one-dimensional mesoscopic phenomena of electron scattering and magnetotransport in NWs, control of magnetization switching in patterned CoFe nanolayers of CoFe/MgO-MTJ electrodes by external magnetic fields, selective-area growth of Si and Ge NWs based on a vapor-solid-liquid method, and magnetotransport properties of a nanowire with ferromagnetic Ni electrodes after carrying out the established device fabrication processes for burying and exposing NWs.
    Japan Society for the Promotion of Science, Grant-in-Aid for Scientific Research (B), Hokkaido University, 17H02727
  • Fabrication and Characterization of Vertical FETs using GaN-based Nanowires
    Grants-in-Aid for Scientific Research
    01 Apr. 2017 - 31 Mar. 2019
    本久 順一
    (1) 前年に引き続き、RF支援分子線エピタキシャル成長(RF-MBE)法を用いて、縦型トランジスタ応用に適したGaNナノワイヤの形成を試みた。特に、前年度不十分であったナノワイヤ長さについて改善を試みた。特に、成長初期は低N2流量、その後高N2流量とした2段階成長を導入することによって、断面寸法150~240nmの範囲で長さ420nm程度のGaNナノワイヤを得ることに成功した。これによりRF-MBE成長により形成したGaNナノワイヤを縦型FETへと応用する見通しを得た。
    (2)成長したGaNナノワイヤをSOGで埋めこんだ後、SOGをエッチングしてナノワイヤ頂上部を露出させた後、上部ならびに基板に電極を形成することによって2端子素子を作製し、その電気伝導特性を評価した。アニール前後の特性を比較したところ、高バイアス領域での微分抵抗が変化しないことから、その値がナノワイヤの固有抵抗であると考えた。そして、その微分抵抗および測定に用いたナノワイヤ2端子素子の総電極面積よりRF-MBEにより形成したGaNナノワイヤの抵抗率を求め、0.25~1.5 ohm・cmの範囲にあることを示した。これらの値は、予想されるGaNナノワイヤの移動度を考慮するとキャリア密度が10^18 cm^-3オーダであることを示唆しており、FET動作をさせる上でも支障のない範囲の値なっていることを確認した。
    (3) FET応用に適したGaNナノワイヤの形成手法として、光支援電気化学エッチングによって微細加工する方法を検討した。適切なマスクの設計により、GaNが光支援化学エッチングにより、光照射した部分を選択的にエッチングできることを確認した。
    Japan Society for the Promotion of Science, Grant-in-Aid for Scientific Research on Innovative Areas (Research in a proposed research area), Hokkaido University, 17H05323
  • A Novel Photodetector Utilizing Semiconductor Nanowires
    Grants-in-Aid for Scientific Research
    01 Apr. 2016 - 31 Mar. 2018
    Junichi Motohisa
    We have developed novel phohtodetectors utilizing InGaAs nanowires (NWs) grown on Si substrates. InGaAs NWs with axial pn-junction was grown on p-type Si substrates partially covered with SiO2 mask by using selective-area metalorganic vapror phase epitaxy (SA-MOVPE). The controllability of the vertical InGaAs NWs, particularly of their In composition, was verified by detail investigation using SEM, XRD, and low-temperature photoluminescence (PL) measurements. Two-terminal devices fabricated using pin InGaAs NWs showed clear photoresponse at room temperature under photo irradiation of 635nm, and the sensitivity measured 0.13 A/W. The photoresponse at around 1.55 micron was also confirmed. Furthermore, the sensitivity of the device was improved by introducing higly-doped contact layers at the top and bottom of the NWs. Core-shell heterostructure was also introduced and photoresponse at 1.55 micron was improved by factor 20 due to the passivation effect of InP shell layers.
    Japan Society for the Promotion of Science, Grant-in-Aid for Challenging Exploratory Research, Hokkaido University, 16K14221
  • Visible light responsive photocatalysts utilizing nitride semiconductor-based nanostructures for artificial photosynthesis
    Grants-in-Aid for Scientific Research
    01 Apr. 2015 - 31 Mar. 2018
    Taketomo Sato
    GaN-based photocatalyst electrodes utilizing electrochemically-formed porous structures have been developed. The precise control of pore diameter and depth has been achieved by optimizing the condition of electrochemical etching and subsequent wet-chemical etching. The decrease of photo reflectance and increase of the effective surface area of GaN porous structures lead to the improvement of the photo-electrochemical conversion efficiency. The functionalization utilizing NiO and Cu2O on n-GaN electrodes was very effective respectively for the improvement of corrosion resistance and the photoelectrochemical conversion in visible light region (400-600nm).
    Japan Society for the Promotion of Science, Grant-in-Aid for Challenging Exploratory Research, Hokkaido University, 15K13937
  • Nanoscale control of nitride semiconductor surface using low-damaged process for high-sensitive chemical sensors
    Grants-in-Aid for Scientific Research
    01 Apr. 2013 - 31 Mar. 2016
    SATO Taketomo; HASHIZUME Tamotsu; MOTOHISA Junichi; YATABE Zenji
    Towards the higher sensitivity of ion-sensitive field-effect transistors (ISFETs) on nitride semiconductors, the porous-gate ISFETs has been proposed and its basic technology was established. The porous structures with a high-aspect ratio having a several 10 nm-diameter were successfully formed in a controlled fashion utilizing the electrochemical oxidation and etching process. It was found that the unique features of porous structures such as a large surface area and a modified potential involved with a high-electric field are very effective to detect the photo-electrochemical reactions with high-sensitivity. The correlation between the ion-diffusion in the pores and charging and discharging to the double layer were discussed on the basis of the experimental and theoretical results, leading to the new finding for the high-speed and high-sensitive chemical sensors.
    Japan Society for the Promotion of Science, Grant-in-Aid for Scientific Research (B), Hokkaido University, 25289079
  • Fabrication of nanowire-based light emitting nanodevices
    Grants-in-Aid for Scientific Research
    01 Apr. 2012 - 31 Mar. 2015
    MOTOHISA Junichi; SASAKURA Hirotaka
    To realize nanowire-based light-emitting devices, we grew III-V semiconductor nanowires by selective-area metalorganic vapor-epitaxy (SA-MOVPE) and carried out characterization of their optical properties. Main results are summarized as follows. (1) The far-field emission pattern of nanowire-based light-emitting diode was investigated experimentally and theoretically. Peculiar emission patterns for nanowires were clrarified. (2) Density-controled InP nanowire arrays were realized by SA-MOVPE. The InAsP quantum dots (QDs) were embedded in the low-density InP nanowire arrays, and emission from a single QD in a single nanowire was confirmed. (3) Mode structure of the nanowire-based optical cavity was investigated by numerical simulation and its design principle was established. GaAs/InGaAs/GaAs core-multishell heterostructure nanowires were grown following the established design and cavity mode resonance was clearly identified by temperature-dependent photoluminescence study.
    Japan Society for the Promotion of Science, Grant-in-Aid for Scientific Research (B), Hokkaido University, 24360114
  • Development of passive wireless sensor powered by vibration generator for safety surveillance of social infractructure
    Grants-in-Aid for Scientific Research
    01 Apr. 2012 - 31 Mar. 2015
    IGARASHI Hajime; WATANABE Kota; IKEBE Masayuki; MOTOHISA Junichi
    Batteryless wireless sensors are very effective for safety surveillance of infrastructures such as bridges, tunnels and steel towers of the power-transmission lines. In this study, vibration generators which power the wireless sensors have been developed. These vibration generators, which harvest energy from minute vibration of the structures, allow us to realize autonomous operation of the wireless sensors.
    Although the structures usually have wide vibration spectra, the conventional vibration generators, which have linear vibration modes, cannot harvest sufficient energy at nonresonant frequencies. In this study, it has been found that it is possible to generate chaotic vibration by introducing new design to the vibration generator and this leads to energy harvesting in wider vibration spectra.
    Japan Society for the Promotion of Science, Grant-in-Aid for Scientific Research (B), Hokkaido University, 24310117
  • Exploration of novel materials for photochemical water splitting based on semiconductor nanowires and nanostructures
    Grants-in-Aid for Scientific Research
    01 Apr. 2012 - 31 Mar. 2014
    MOTOHISA Junichi; SATO Taketomo
    To explore novel materials for photochemical water splitting, we attempted the fabrication of GaN-based nanostructuers and their characterization of electrochemical properties. Growth of GaN and InGaN nanostructures were attempted by selective-area growth using RF-plasma-assisted molecular beam epitaxy. Hexagonal pyramidal structures of GaN were successfully fabricated and a use of alternate mask material for selective-area growth was suggested to be important to realized nanowires which is suitable for water splitting. We also investigated the photo-electrochemical properties of GaN by measureing current-voltage characteristics of GaN in electroryte with and without light irradiation. Furthermore, their characteristics was compared with porous structures, which were fabricated by photo-assisted chemial etching and had high-denstiy nanometer-sized pores on the surface, and it was found that porous structures allowed much lager photocurrent as compared to planar structures.
    Japan Society for the Promotion of Science, Grant-in-Aid for Challenging Exploratory Research, Hokkaido University, 24656196
  • Study on Spin-Polarized Light-Emitting Diodes using Ferromagnetic/Semiconducting Nanowire Hybrids on Si Substrate
    Grants-in-Aid for Scientific Research
    01 Apr. 2011 - 31 Mar. 2014
    HARA Shinjiro; MOTOHISA Junichi; KLAR Peter Jens; ELM Matthias Thomas; KRUG VON NIDDA Hans-albrecht
    We realized vertical free-standing semiconducting nanowires (NW) hybridized with ferromagnetic MnAs nanoclusters (NC), which enables us to confine carriers one-dimensionally and control carrier spins, by utilizing our unique selective-area growth method. The dependences of MnAs NC formation on various NW templates were investigated. We observed that MnAs layers were grown on the top {111}B surface of InAs NWs with a diameter of about 80 nm, and into the host NWs from the side walls to form MnAs/InAs hetero-junctions, which enable us to realize spin-carrier injection to NWs, and in which most of the c-axes of hexagonal NiAs-type MnAs layers were approximately parallel to the <111>B directions of InAs NWs. We developed two-terminal device processes to realize spin-polarized light-emitting diodes. I-V characteristics of the prototype MnAs/GaAs hybrid NWs showed p-type conductivity possibly owing to thermal diffusion of Mn atoms into the host GaAs NW surfaces during the MnAs NC formation.
    Japan Society for the Promotion of Science, Grant-in-Aid for Scientific Research (B), Hokkaido University, 23360129
  • 化合物半導体配列ナノ構造を基盤とする超接合光吸収体の創成と太陽電池応用
    科学研究費助成事業
    2009 - 2010
    佐藤 威友; 橋詰 保; 本久 順一; 古賀 裕明
    平成22年度は、n形インジウムリン(InP)ポーラス(多孔質)構造の内壁に白金(Pt)薄膜を形成する手法を開発し、InP配列ナノ構造を基盤とするPt/InPショットキー型光電変換素子の試作を行った。
    1.n形InP多孔質構造の孔内壁表面にPt薄膜を電解析出により形成する手法を開発した。真空蒸着法と比較してPt薄膜による孔内壁表面の被覆率が高く、Pt薄膜の厚さは時間により制御可能であることを明らかにした。特に電解析出電圧をパルス波形で印加することにより、膜厚の緻密な制御が可能であり、孔径600nmで深さ4μmからなる多孔質構造の内壁に厚さ20nmの均一なPt薄膜の形成に成功した。
    2.作製したPt/InP多孔質構造の光反射率特性を明らかにした。入射光200nm-1100nmの波長領域における光反射率は5%以下であり、平坦なInP基板と比較して表面反射が10分の1に低減されていることを明らかにした。
    3.作製したPt/InP多孔質構造の電気的特性を明らかにした。上部(Pt側)と下部(InP側)に電極を形成して測定した電流・電圧特性が整流性を示すことを明らかにし、Pt/InP多孔質構造の界面にショットキー障壁が形成されていることを確認した。また、光照射下では、光強度に応じて逆方向電流が増大することを明らかにした。この増加電流は、比較用に作製したPt/プレーナInP接合と比べて2~3桁大きい。これらの結果により、微細孔が周期的に配列した半導体多孔質構造は、内壁表面に適切な電位障壁を形成することで光キャリアを効率的に分離することが可能であり、太陽電池をはじめとする高効率光電変換素子への応用に有望であることが示された。
    日本学術振興会, 挑戦的萌芽研究, 北海道大学, 21656078
  • Semiconductor Nanowire Electronics by Selective-Area Metal-Organic Vapor Phase Epitaxy
    Grants-in-Aid for Scientific Research
    2006 - 2010
    FUKUI Takashi; AMEMIYA Yoshihito; MOTOHISA Junichi; KASAI Seiya; HARA Shinjiro
    A selective growth method for semiconductor nanowires by using electron beam lithography and metal organic vapor phase epitaxy has been established. The crystal structure and optical properties of GaAs and InP nanowires grown were characterized by electron microscopy and photoluminescence. Transistors, light emitting diodes and solar cells using heterostructure/p-n junction nanowires were fabricated to investigate the device characteristics, which showed promise for application to future nano-electronics.
    Japan Society for the Promotion of Science, Grant-in-Aid for Specially Promoted Research, Hokkaido University, 18002003
  • Development of Quantum Integrated Hardwares based on Semiconductor Nanowires
    Grants-in-Aid for Scientific Research
    2007 - 2009
    MOTOHISA Junichi; IKEBE Masayuki
    We developed a formation method of high-density and highly uniform array of semiconductor nanowires to realize quantum integrated hardwares. In particular, fabrication and characterization of nanowire field-effect transistors (FETs) were charried out, and vertical nanowire FETs on Si substrates were demonstrated. We also proposed vertically-integrated logic circuits based on vertical FETs and investigated a method to laterally align nanowires for their high-density integration.
    Japan Society for the Promotion of Science, Grant-in-Aid for Scientific Research (A), Hokkaido University, 19206031
  • 有機金属気相選択成長法によるガリウムヒ素単電子メモリの作製と評価
    科学研究費助成事業
    2006 - 2007
    福井 孝志; 本久 順一; 原 真二郎
    有機金属気相(MOVPE)選択成長技術とナノ構造の自然形成技術の組み合わせにより作製した量子ドット構造を用いた「単一電子メモリ」の実現を目的とし、本年度は、これまで作製を行ってきた、GaAs細線とInAs量子ドット構造を有する量子ドットメモリのトランスファ特性において生じるヒステリシスについて、その機構に関する詳細な評価・検討を行った。今回、電流ICTS法と呼ばれる評価手法を用い、トラップの準位、及び捕獲断面積を評価し、ヒステリシス機構について検討した。評価にはMOVPE選択成長技術を用いて作製した、InAs量子ドットを有する細線FET構造を用いた。電流ICTS法とは、Vdsを一定に保つと同時に、ゲート電極にパルス的に電圧を印加することでIdsに生じるトランジェントから、活性化エネルギ、捕獲断面積、及びトラップの密度を評価する手法である。得られたICTS信号(t・dI/dt)の温度依存性曲線では、ピークの位置が時定数を示す。温度低下に伴いピークが長時間側にシフトする傾向が確認された。時定数のアレニウスプロットにより、今回の測定結果からは典型的に2つの活性化エネルギを見積もることができ、それぞれ0.33eV、0.18evである。またそれらの捕獲断面積は1.6×10^<-15> cm^2、3.8×10^<-19> cm^2であった。捕獲断面積のオーダを考慮するとこれらの準位は量子ドット自体によるものでなく、量子ドットに起因して形成された欠陥の準位であると考えられるが、詳細なデータ解析は現在行っている最中である。またその他、量子ドットに注入するキャリアソースとして、半導体薄膜上の強磁性体ナノ構造の自己形成技術についても結晶成長実験を行った。
    日本学術振興会, 基盤研究(B), 北海道大学, 18360142
  • 半導体・強磁性体複合型ナノワイヤを用いた縦型ナノスピントランジスタの研究
    科学研究費助成事業
    2005 - 2006
    原 真二郎; 本久 順一; 福井 孝志
    化合物半導体への強磁性MnAsナノ構造のエピタキシャル成長技術確立を目的とし、本年度は主にプレーナGalnAs{111}面上の有機金属気相成長に関して、結晶面方位依存性や、供給ガス比率(V/Mn比)・成長時間等の成長条件依存性を評価し、ナノクラスタ形成制御の観点から詳細なデータ取得を行った。これまで断面格子像観察・電子線回折による構造評価及び、磁気異方性評価から.、(111)B面上のMnAs成長では、六方晶のNiAs型MnAsナノクラスタが立方晶の閃亜鉛鉱型GaInAs表面に形成され、MnAsのc軸がGalnAsの[111]B方向と平行であるとの知見を得た。今回矩形ナノクラスタが形成される(001)面上及び、よりサイズの小さい六角形ナノクラスタが高密度に形成される(111)A面上で詳細な構造評価を行った結果、いずれの結晶面方位においてもNiAs型ナノクラスタが形成するものの、(111)B面上とは異なりナノクラスタの結晶軸が下地GaInAsの[111]方向から僅かに傾く、あるいはばらつきを持つ傾向にあった。これはV族(As)原子に覆われた(111)B表面と異なり、特に完全なIII族面である(111)A面では、 GaInAs層に埋め込まれたMnAsナノクラスタが形成されやすいことに起因すると考えられる。ただ(111)A面上においてもV/Mn比を60から1125と大幅に増加させることにより、微小ナノクラスタがより高密度に形成され、周囲の結晶表面の平坦性も向上する。今回の結果は、MnAsの結晶成長では従来のIII-V族化合物半導体に比べ著しく高いV族分圧が必要であることを示唆しており、半導体・強磁性体複合構造形成のための有用な知見となった。またより格子不整合度の小さいGaAs(111)B面上のMnAs成長では、10μm^2以上の広範囲に渡って平坦に薄膜状成長する傾向にあった。
    日本学術振興会, 萌芽研究, 北海道大学, 17656100
  • 半導体ナノワイヤを用いた単一光子光源の研究
    科学研究費助成事業
    2005 - 2006
    本久 順一; 原 真二郎; 福井 孝志
    平成18年度は前年度の成果を基盤として、有機金属気相選択成長法により作製されたナノワイヤの光学特性評価を目的として、以下のような研究を行った。
    まず、InGaAs/GaAsナノワイヤに対し、顕微フォトルミネセンス(PL)法によりその発光特性の評価を行った。特に光学測定系の改善により、空間分解能約1μm程度でナノワイヤからの発光の空間像をを観察したところ、ナノワイヤ内部に局在するInGaAs層から実際に発光していることが明確に示された。また、同様の空間像から、直径約200nm、長さ2.6μm程度のナノワイヤにおいて、その両端から強い発光が得られていることが確認された。これはナノワイヤ内部で発生した光がナノワイヤに添って伝搬している、すなわちナノワイヤが光導波路として機能しているためであると考えられ、微小光素子や高効率の単一格子光源応用に向けての重要な知見を得た。
    次に、InPナノワイヤに対し、顕微PLおよびラマン散乱測定により評価を行った。その結果、 InPナノワイヤでは平均的に10^<17>cm^<-3>程度あるいはそれ以下の電子がバックグラウンドに存在していることが確認された。そしてこれらのナノワイヤのうち、発光効率が高く不純物密度が少ないと考えられる単一のナノワイヤを詳細に評価した結果、ウルツ鉱形構造を有するInPナノワイヤではそのバンドギャップエネルギーカミ約1.50eVであり、InPバルクより80meV程度広いことが明らかとなった。
    さらにInPナノワイヤに対して不純物ドーピングと伝導形の制御を試みた。シランをドーピングガスとしてナノワイヤ成長時に供給した場合、参照用のプレーナ基板と比べ密度が1桁程度少ないものの、期待通りシリコンがn形の不純物として取り込まれていることが明らかとなった。また、ジエチルジンクをドーピングガスとして用いた場合には、ラマン散乱の測定結果より、亜鉛がナノワイヤ中に取り込まれ、p形不純物として働いていることが確認された。
    日本学術振興会, 萌芽研究, 北海道大学, 17656019
  • Fabrication of Photonic Crystals by Selective-Area Metalorganic Vapor Phase Epitaxy and Their Application to Devices
    Grants-in-Aid for Scientific Research
    2003 - 2005
    MOTOHISA Junichi; FUKUI Takashi; SANO Eiichi; YANG Lin; SATO Taketomo
    We have established a method to fabricate two-dimensional crystals (2D-PhCs) and 2D-PhC slabs (2D-PhCs) by utilizing selective area metalorganic vapor phase epitaxial (SA-MOVPE) and investigated their optical properties. By doing SA-MOVPE growth on GaAs (111)B or InP(111)B substrates partially covered with periodic array of hexagonal masks, we have fabricated air-hole array of GaAs- and InP-based semiconductors. If the SA-MOVPE is carried out on sacrificial AIGaAs layer, For GaAs-based 2D-PhCs, we have succeeded in the fabrication of air-bridge-type 2D-PhCs and 2D-PhCs with line-defect and point-defect structures. We also have succeeded in the formation of GaAs/AlGaAs quantum wells with periodic air-holes and confirmed their photoluminescence (PL). InP- based 2D-PhCs with period of 400-500nm were also successfully formed after optimization of growth conditions. Emission from InP/InGaAs quantum well structures embedded in 2D-PhC was also fabricated and their optical properties were investigated PL, demonstrated that this structure is promising for the application of photonic devices operating in the optical-fiber communication wavelength. In addition, GaAs- and InP- based 2D-PhCs constructed from periodic array of hexagonal pillar arrays were also fabricated by SA-MOVPE on (111)B GaAs and (111)A InP substrates, respectively, where array of circular mask opening are defined. In particular, for GaAs-based pillar-type 2D-PhCs, it was found that the light emission from GaAs/AIGaAs quantum wells formed on the top of the pillars is found to dependent on the pitch of the pillar arrays and is enhanced by factor of 10 as compared to the reference planar structure. This phenomenon is qualitatively understood by the enhancement of light-extraction efficiency originating from the formation of photonic bandstructure by the introduction of the periodic structure on the top of high-index slabs. The optical properties 2D-PhCs and 2D-PhCSs, such as photonic bandstructures, dispersion of line-defect waveguides, transmittance and reflectivity, are also investigated theoretically using finite-difference-time-domain method, plane-wave expansion method, and scattering matrix method to understand the optical properties of 2D-PhCs and 2D-PhCSs, including a proposal of modified effective index method applicable to 2D-PhCs with high index contrasts.
    Japan Society for the Promotion of Science, Grant-in-Aid for Scientific Research (A), HOKKAIDO UNIVERSITY, 15206030
  • 有機金属気相成長高密度量子ナノ構造による単電子集積エレクトロニクス
    科学研究費助成事業
    2001 - 2005
    福井 孝志; 長谷川 英機; 雨宮 好仁; 本久 順一; 橋詰 保; 葛西 誠也
    平成17年度は、有機金属気相成長(MOVPE)選択成長法による量子ナノ構造を利用した単電子素子・単電子回路の実現と、高密度量子ナノ構造の周期配列の形成技術の確立を目的として、以下の研究を行った。
    1.前年度に続き、単電子トランジスタの論理回路応用を目的に集積化を進めた。2分決定グラフ論理による1ビット加算器に関して、論文公表することが出来た。また、選択成長により作製したリッジ型量子細線と、自己形成InAs量子ドットを組み合わせた、フローティングゲート型の単電子メモリーの試作とその動作特性解析を進めた。試作した素子を温度20Kで評価した結果、ドレイン電流に、ゲート電圧に対する明瞭な時計回りのヒステリシスが観測された。印加するゲート電圧の最大値を変化させる実験、あるいはヒステリシスの幅やしきい値のシフト量およびその温度依存性、さらにゲート電圧を変化させた後の時間応答などの実験結果により、このヒステリシスが、ゲート側から注入された電子が量子ドットに保持されることに起因することが示された。
    2.単電子素子の高温動作化を目的として、選択成長を用い、新しい種類のナノ構造の作製を試みた。具体的には、円形あるいは6角形のマスク開口部を有するGaAs(111)B基板に対して選択成長を行うことにより、直径50nm、長さは9μmにもおよぶ、GaAsナノワイヤ構造の作製に成功した。そして、このナノワイヤを単電子素子へと応用するプロセス手法を考案した。同様な構造はInP(111)A基板上にも作製した。まずInPナノワイヤ、横方向成長を利用したInP/InAsコアシェル構造、さらにInP/InAs/InP横方向ヘテロ構造からなるInAs量子リングを作製し、その光学的特性から、量子閉じ込め構造を確認した。
    日本学術振興会, 学術創成研究費, 北海道大学, 13GS0001
  • Surface/interface control of high-frequency and high-power transistors based on GaN materials
    Grants-in-Aid for Scientific Research
    2002 - 2004
    HASHIZUME Tamotsu; MOTOHISA Junichi; KASAI Seiya; AKAZAWA Masamichi
    The purpose of this research was to characterize and control surface/interface properties of GaN-based material systems such as AlGaN/GaN hetrostrcutures for the stability improvement of high-frequency and high-power transistors. The main results obtained are listed below :
    (1)Serious deterioration such as stoichiometry disorder and nitrogen deficiency (N deficiency) was found at the processed AlGaN surfaces. This resulted in formation of a localized deep donor level related to N vacancy (V_N), causing excess leakage currents at the AlGaN Schottky interface and serious drain current collapse in AlGaN/GaN heterostructure field effect transistors.
    (2)An Al_2O_3-based surface passivation scheme including the N_2-plasma surface treatment was proposed and applied to an insulated-gate type HFET. A large conduction-band offset of 2.1 eV was achieved at the Al_2O_3/Al_<0.3>Ga_<0.7>N interface. No current collapse was observed in the fabricated Al_2O_3 insulated-gate HFETs under both drain stress and gate stress.
    (3)From the detailed temperature-dependent current-voltage (I-V-T) measurements, we discussed the mechanism of leakage currents through GaN and AlGaN Schottky interfaces. The experiments were compared to the calculations based on thin surface barrier model in which the effects of surface defects were taken into account. Our simulation results indicates that the barrier thinning caused by unintentional surface-defect donors enhances the funneling transport processes, leading to large leakage currents through GaN and AlGaN Schottky interfaces.
    Japan Society for the Promotion of Science, Grant-in-Aid for Scientific Research (B), HOKKAIDO UNIVERSITY, 14350155
  • 半導体人工格子による磁性制御
    科学研究費助成事業
    2002 - 2003
    本久 順一; 須田 善行; 葛西 誠也
    平成15年度は、フラットバンド強磁性が実験的に確認できるという理論的予測がされている、周期0.7μmのInAsによるKagome格子を有機金属気相成長(MOVPE)選択成長法により作製するするため、以下のような実験を行った。
    まず、SiO_2膜堆積を堆積したGaAs(111)A基板に対して、電子線リソグラフィ、およびウエットエッチングにより、MOVPE選択成長用のマスク基板を作製した。マスクのパターンは昨年度のものと同様、6角形あるいは3角形のマスクを周期的に配列させたものであるが、今回は、(111)B基板ではなく、(111)A基板を用いている。その後、窓明け部分へ、GaAsおよびInAsを、MOVPE選択成長を行った。
    まず、(111)Aプレーナ面では平坦な表面が得られる、温度500Cにおいて格子周期が1〜3μmのマスクパターンに対して、選択成長を行った場合、細線の交点部分にのみ、3次元的にInAsが成長するが、成長温度を下げると、3次元成長モードから2次元成長へと転移することが明らかとなった。この成長モードの転移は、成長温度の低下に伴う表面拡散長の減少によって説明でき、またGaAsとInAsの格子定数の差による歪みは、その成長界面で発生したミスフィット転移により緩和されていると考えられる。この結果、ピットを含み、表面平坦性には問題があるが、垂直{110}ファセットを側壁として有する細線の交差構造である、InAsによるKagome格子が、そのマスクパターンを踏襲して形成可能であることが示された。さらに、表面平坦性を改善するため、アルシン(AsH_3)分圧に対する依存性について調べた。その結果、AsH_3分圧を下げた場合に、表面平坦性に優れ、また横方向成長が抑制され、マスクパターンを踏襲したKagome格子構造が形成されることがわかった。
    以上に述べた成長条件の最適化の結果、温度400C・低AsH_3分圧という成長条件で、MOVPE選択成長により、周期0.7μmのInAs Kagome格子の形成に成功した。
    日本学術振興会, 萌芽研究, 北海道大学, 14655112
  • Formation of Photonic Crystals by Selective Area Growth and Their Applications
    Grants-in-Aid for Scientific Research
    2000 - 2002
    MOTOHISA Junichi; SATO Taketomo; HASHIZUME Tamotsu
    We have developed a technique to form two-dimensional periodic array of hexagonal pillars and air-hole structures for the application of two-dimensional crystals (2DPCs) by selective area metalorganic vapor phase epitaxial (SA-MOVPE) growth. Firstly, SA-MOVPE of GaAs and AlGaAs was carried out on (111)B GaAs substrates partially covered with SiO_2 masks. Array of circular or hexagonal openings of the mask pattern was arranged to realize triangular lattice with periodicity of about 0.5μm. By optimizing the growth conditions, uniform array of hexagonal pillar structures consisting of vertical {110} facets was successfully grown on the masked substrates, which can be used as 2DPC. Similar array of hexagonal InGaAs pillars was also grown on (111)B InP masked substrates, and was found to exhibit high optical qualify suitable for 2DPCs using InP-based materials. In addition, by growing a masked substrate with hexagonal SiO_2 masks arranged to form triangular lattice, we succeeded in the growth of GaAs 2DPC structures with hexagonal air-hole arrays when the growth conditions were optimized to suppress lateral overgrowth. Furthermore, by growing air-hole type 2DPCs on AlGaAs (111)B surfaces and selective undercut etching of AlGaAs, 2DPC slab was also successfully fabricated. Finally, Photonic bands of 2DPCs consisting of hexagonal air-hole arrays or hexagonal dielectric rods were also calculated by using plane-wave expansion method, and they were compared with those consisting of conventional circular air-holes or circular rods. Although the overall features of the photonic bands quite looked alike, the discrepancy originating from the shape of air-holes and rods were found. Especially in hexagonal air-hole arrays in orthogonal-type triangular lattice, the enhancement of overlap between TM and TE gap demonstrated, which is effective to realize 2D full photonic bandgap.
    Japan Society for the Promotion of Science, Grant-in-Aid for Scientific Research (B), HOKKAIDO UNIVERSITY, 12450117
  • 単一電子入力・単一電子出力型記憶素子の研究
    科学研究費助成事業
    2001 - 2001
    福井 孝志; 本久 順一
    平成13年度は、有機金属気相成長(MOVPE)選択成長法により高密度量子ナノ構造の形成技術を確立すること、それを利用した単電子トランジスタの基本的特性や物理を解明すること、および、それらを回路へと応用することを目的として、以下の研究を行った。
    1.MOVPE選択成長のマスクパターンを適切に設計することにより、高密度GaAs量子ドットアレイや、高密度の量子ドット-量子細線結合構造アレイの形成を試みた。作製された構造のカソードルミネセンス測定から、量子ナノ構造が設計通りに形成されていることが確認された。
    2.上記の形成技術を基盤として、量子ドットによる単電子トランジスタを形成し、その伝導特性を極低温において詳細に測定した。明瞭なクーロン振動・クーロンダイアモンドが確認されるとともに、ある条件下では、非常に強い量子ドットにおける近藤効果が観測された。特に、強磁場中で観測された近藤効果においては、その微分コンダクタンス特性の零バイアス付近に特異なディップ構造を観測し、それが2段階近藤効果に起因していることを明らかにした。
    3.相補型インバーター回路への応用を目的として、上記の単電子トランジスタを、2個同一基板上に集積化し、直列接続した回路を試作した。2つの単電子トランジスタの相補的動作を確認し、相補型単電子インバーター回路実現への見通しを得た。
    日本学術振興会, 基盤研究(B), 北海道大学, 13450117
  • "Insulated gate structures on GaN and their interface properties"
    Grants-in-Aid for Scientific Research
    1999 - 2001
    HASHIZUME Tamotsu; TAKEYAMA Mayumi; KANESHIRO Chinami; MOTOHISA Junichi; FUJIKURA Hajime
    For the application to high-power/high-frequency electronic devices, we have investigated the formation processes of insulated structures on GaN and their interface properties. The main results obtained are listed below :
    (1) Chemistry and electronic properties of GaN surfaces after various kinds of surface treatments were characterized by x-ray photoelectron spectroscopy (XPS). Strong upward band bending of 1.4 eV was found at the air-exposed GaN surface. This is due to the high density of surface states. The surface treatment in the NH_40H solution and the ECR-excited N_2 plasma significantly decreased the surface band bending to 0.5 eV, indicating the reduction of the Fermi level pinning.
    (2) We have successfully fabricated the SiN_χ gate structure on the treated n-GaN surface by the ECR-CVD process. The SiN_χ/n-GaN structure showed the type-I band lineup and a low interface state density distribution in the range of 10^<11> cm^<-2> eV^<-1>. The surface passivation utilizing the ECR-CVD SiNx film enhanced the drain saturation current and improved the stability in the GaN/AlGaN heterostructure field effect transistors.
    (3) Electrical characterization of AlN/GaN interfaces was carried out by the C-V technique in samples grown by metal organic chemical vapor deposition. A low value of interface state density D_ of < 1x 10^<11> cm^<-2> eV^<-1> was achieved around the energy position of Ec-0.8eV. This indicates that the AlN/GaN structures have good interface properties with low interface state density, and are very promising for advanced MIS devices.
    (3) A novel surface passivation process for AIGaN/GaN heterostructures utilizing an ultrathin Al_20_3 layer (〜1 nm) was proposed. The reverse leakage current for the Schottky gate contact on the Al_20_3-passivated heterostructure surface was reduced by three orders of magnitude than that for the conventional Schottky gate structure. C-V results showed good gate controllability of two-dimensional electron gas (2DEG) by the novel gate structure.
    Japan Society for the Promotion of Science, Grant-in-Aid for Scientific Research (C), HOKKAIDO UNIVERSITY, 11650309
  • Metal contact formation to GaN based on the interface control technologies
    Grants-in-Aid for Scientific Research
    1999 - 2001
    HASHIZUME Tamotsu; KASAI Seiya; KANESHIRO Chinami; MOTOHISA Junichi; SEKI Shouhei; TAKEYAMA Mayumi
    The purpose of this research was to develop the formation processes of a stable Schottky contact and a ohmic contact with a low resistivity to GaN, based on the systematic characterization of the GaN surfaces and metal-GaN interfaces. The main results obtained are listed below:
    (1) Chemistry and electronic properties of GaN surfaces after various kinds of surface treatments were characterized by x-ray photoelectron spectroscopy (XPS). Strong upward band bending of 1.4 eV was found at the air-exposed GaN surface. This is due to the high density of surface state. The surface treatment in the NH_4OH solution and the ECR-excited N_2 plasma significantly decreased the surface band bending to 0.5 eV, indicating the reduction of the Fermi level pinning.
    (2) We investigated the leakage mechanism through metal/n-GaN interfaces by detailed current-voltage-temperature (I-V-T) measurements. A large deviation from the thermionic emission (TE) transport was observed in the reverse I-V curves with a large excess leakage. A novel barrier- modified thermionic-field emission (TFE) model based on presence of near-surface fixed changes or surface states was proposed to explain the observed large reverse leakage currents.
    (3) A novel surface passivation process for AlGaN/GaN heterostructures utilizing an ultrathin Al_2O_3 layer (〜 1 nm) was proposed. The reverse leakage current for the Schottky gate contact on the Al_2O_3-passivated heterostructure surface was reduced by three orders of magnitude than that for the conventional Schottky gate structure. C-V results showed good gate controllability two-dimensional electron gas (2DEG) by the novel gate structure.
    (4) Mg-doped GaN surfaces were characterized by XPS. The surface accumulation of Mg at the Mg-doped GaN seems to cause the formation of the disordered surface layer including a tenacionus oxide layer, leading to the large downward band-bending of 1.3-1.4 eV at the surface. The surface treatment in ECR-N_2 plasma was very effective in removing such a disordered layer.
    Japan Society for the Promotion of Science, Grant-in-Aid for Scientific Research (B), HOKKAIDO UNIVERSITY, 11555081
  • Formation and Characterization of High Density Semiconductor Quantum Dots
    Grants-in-Aid for Scientific Research
    1997 - 2000
    FUKUI Takashi; MOTOHISA Junichi
    We have developed a technique to form position-and size-controlled quantum wires (QWRs) and quantum dots (QDs) by selective area metalorganic vapor phase epitaxial (SA-MOVPE) growth. The technique is applied for the direct fabrication of single electron transistors and circuits using QD-QWR coupled structures. Main results of the project are summarized below.
    (1) We investigated the mechanism of SA-MOVPE for the fabrication of high-density QD arrays with extreme uniformity. We have found and clarified the self-limited mechanism in SA-MOVPE where the top size and shape of the GaAs pyramidal structures and ridge structures are maintained after the formation of such 3-dimensional structures. This self-limited growth mode is utilized to achieve size uniformity in QDs. We also have clarified that the top size of the GaAs pyramid is determined by the balance between the adsorption and desorption of adatoms at the step edges and can be controled by the growth conditions.
    (2) Based on the fabrication technique of QD arrays, we have proposed and succes sfully fabricated a two-dimensional coupled array of QDs and QWRs by SA-MOVPE.The optical characterization has confirmed the formation of network-like array of QDs and QWRs. The results indicate that our proposed fabrication method is effective to realize high-density integration of quantum devices, such as single electron transistors, for future electronics.
    (3) Single electron transistors have successfully been fabricated by the combination of coupled structures of QWR-QD-QWR formed by SA-MOVPE technique and Schottky gate technology. We have succeeded in the demonstration of the circuit operation of single electron inverters, which integrates quantum wire transistor and single electron transistors fabricated by one-step growth on designed masked substrate for SA-MOVPE.Our quantum dot devices also have shown to exhibit strong lateral confinement that are beneficial to explore the physics of nanostructures, such as Kondo effect in QDs.
    Japan Society for the Promotion of Science, Grant-in-Aid for Specially Promoted Research, HOKKAIDO UNIVERSITY, 09102001
  • "Realization of Schottky-limit at metal-semiconductor interfaces and its application to electron devices"
    Grants-in-Aid for Scientific Research
    1997 - 1998
    HASEGAWA Hideki; WU Nan-jan; FUJIKURA Hajime; MOTOHISA Jyunichi; HASHIZUME Tamotsu
    The purpose of this study is to realize the "Schottky limit" for various metal-compound semiconductor (M-S) interfaces by removing Fermi-level pinning using an in-situ electrochemical process and to apply this process to various devices. The main results obtained are listed below :
    1) A novel in-situ electrochemical process enables us to produce Schottky contacts with strongly metal-workfunction dependent Schottky barrier heights (SBHs) for InP, GaAs and GaN.Particularly, SBHs higher than 0.86 and 0.92eV were achieved for Pt/n-InP and Pt/n-GaAs contacts, respectively. These values are close to those in the Schottky limit.
    2) The M-S interfaces prepared by the in-situ electrochemical process were found to possess no oxide interlayers, no interface stress as well as no process-induced defect levels.
    3) Detailed AFM measurements revealed that the electrochemical deposition was initiated by formation of nm-sized metal particles. Further deposition did not increase the particle size but increased density of particle. The SBH values exhibited a strong correlation with the particle distribution. The most uniform distribution of the smallest particles gave highest SBH values for Pt/n-InP contact. An I-V measurements using AFM system with conductive tip revealed that such high SBHs were realized in single Pt particles on InP and GaAs.
    4) The above results can be explained as follows : Under optimized conditions, the low-energy electrochemical process forms fine metal nano particles without causing a large degree of disorder on the semiconductor surface. The interface is free from oxide interlayers, interface stress and process-induced defects. This leads to removal of the Fermi-level pinning and to strongly metal-workfunction dependent SBH values.
    5) The in-situ electrochemical process was successfully applied to formation of sub-micron T-shaped
    Japan Society for the Promotion of Science, Grant-in-Aid for Scientific Research (B), HOKKAIDO UNIVERSITY, 09450118
  • 人工原子″スーパーアトム″の作製と評価
    科学研究費助成事業
    1996 - 1997
    齊藤 俊也; 本久 順一; 藤倉 序章; 本久 順一; 齊藤 俊也
    平成9年度は、人工原子″スーパーアトム″の作製に関する基礎検討として、分子線エピタキシャル成長方を用いた微細構造形成の検討、また、そのネットワーク化に向けた検討を行うとともに、自己形成量子ドットの作製および光学的評価を行ない、以下のような結論を得た。
    (1)InP基板表面に正方形のメサ(台地状の構造)に線状のメサが結合した構造を加工により形成し、この上に分子線エピタキシ(MBE)法によりInAlAs/InGaAs/InAlAs構造の成長を行った。詳細な構造観察の結果、適切な成長条件下で、正方形メサ上にInGaAs量子ドットが、線状メサ上にInGaAs量子細線が形成され、InAlAs/InGaAs系の材料を用いた選択成長が人工原子構造の作製、およびその多数個連結した素子の作製に関して今後有用であることが示唆された。
    (2)詳細な光学的測定によって、上記のInGaAs量子細線・量子ドットの結合部分には高さ100meV程度のポテンシャル障壁が存在することが明らかとなった。また、初期加工基板形状・成長条件等を様々に変えて形成した細線・ドット結合構造の構造観察から、ドット・細線・ポテンシャル障壁のサイズが、初期基板形状・成長条件により精密に制御可能であることが明らかとなり、InAlAsを核とする人工原子およびネットワークの形成手法に関する重要な知見を得た。
    (3)また、格子不整合系の人工原子作製の可能性に関する基礎検討として、GaAs/InAs自己形成量子ドットの形成、および光学的評価を行い、ウェット層とドットのクーロン相互作用が光学的特性に影響を及ぼすことが判明した。
    日本学術振興会, 萌芽的研究, 北海道大学, 08875001
  • Control of surface states for III-V semiconductor quantum structures and its application to novel optical devices
    Grants-in-Aid for Scientific Research
    1995 - 1996
    HASEGAWA Hideki; AKAZAWA Masamichi; MOTOHISA Junichi; HASHIZUME Tamotsu
    The purpose of this study is to investigate the interaction mechanism between surface states and confined levels in III-V compound semiconductor quantum structures and to control the surface properties by use of ultrathin silicon interface control layr (SiICL) for fabrication of novel optical devices. The main results obtained are listed below :
    (1) It was found that the photoluminescence (PL) intensity from the near-surface quantum well (OW) with the surface-to-well distance of 5nm, was reduced by a factor of 1000 as compared with that from the reference QW located deeply inside. We revealed that this phenomenon is caused by strong interaction between the quantized states in near-surface QW and surface states. Acomplete recovery of PL intensity was achieved by use of Si-ICL based passivation technique.
    (2) X-ray photoelectron spectroscopy analysis revealed that there were no oxidized and nitrided phase of semiconductor surface at the passivation film/semiconductor interfaces.
    (3) By applying the Si-ICL passivation method, a nearly complete recovery of PL intensity was achieved with an observed maximum recovery factor of 400 for the InGaAs quantum wires. The quantum wires passivated with SiICL showed strong PL intensity even at room temperature.
    (4) The Si-ICL passivation technique was successfully applied to passivation of side walls of InGaAs quantum wires fabricated by wet etching process.
    (5) Detailed computer simulation pointed out that a clear passivation effects can be explained by substantial reduction of surface states by Si-ICL based passivation technique
    Japan Society for the Promotion of Science, Grant-in-Aid for Scientific Research (B), HOKKAIDO UNIVERSITY, 07455017
  • Fabrication of Ultrasmall Compound Semiconductor Nanostructures with Controlled Interfaces and Characterization of Their Electronic Properties
    Grants-in-Aid for Scientific Research
    1994 - 1995
    MOTOHISA Junichi; SAITOH Toshiya; SAWADA Takayuki
    The objective of the present research is to realize semiconductor quantum nanostructures with controlled interfaces by utilizing the self-organized nature of the crystal growth. In particular, various types of quantum nanostructures were fabricated by metal-organic vapor phase epitaxial growth (MOVPE) growth on patterned substrates or on vicinal substrates. The main results are listed below.
    (1) We studied on a growth process on patterned GaAs (001) substrate during metal-organic vapor phase epitaxy (MOVPE) and a novel approach for the fabrication of AlGaAs/GaAs quantum dot (QD) structures. The patterned substrate have an array of holes on the surface and those holes are partially filled with GaAs by MOVPE growth, followed by GaAs/AlGaAs quantum well structures. Detailed investigation on growth process on such patterned substrates revealed the presence of complicated two-dimensional migration of Ga and Al between different facets. Formation of GaAs dots was directly confirmed by spatially resolved cathodoluminescence measurements.
    (2) We propose a new, lateral surface superlattice (LSSL) type of electron interference devices, where the period of LSSL is typically 60nm, by utilizing multiatomic steps on a vicinal GaAs (001) surface. Conductivity of the device is theoretically studied by taking the effect of randomness in the LSSL into account. We also investigate its drain and transconductance characteristics experimentally at low temperatures, and found clear oscillations in gm-V_G characteristics, which were ascribed to the electron interference effect.
    Japan Society for the Promotion of Science, Grant-in-Aid for General Scientific Research (B), HOKKAIDO UNIVERSITY, 06452208
  • Fabrication and Characterization of Self-organized Quantum Nano-structures.
    Grants-in-Aid for Scientific Research
    1994 - 1995
    FUKUI Takashi; MOTOHISA Junichi; HASEGAWA Hideki
    We have fabricated AlGaAs/GaAs quantum dot structures using selective area metalorganic vapor phase epitaxy (MOVPE). First, GaAs pyramidal structures with four-fold symmetric {011} facet side walls are formed on SiN_x masked (001) GaAs with square openings. Once the pyramidal structures were completely formed, no growth occurs on the top and side walls of the pyramids. Furthermore, the shape and width of the top area observed by a scanning electron microscope (SEM) and an atomic force microscope (AFM) shows to be highly uniform. This indicates that self-limited growth mode occurs. Next, using these uniform pyramids, GaAs quantum dots are overgrown on the top of pyramids using different growth conditions. Sharp photoluminescence (PL) spectra are observed from uniform quantum dots.
    Japan Society for the Promotion of Science, Grant-in-Aid for General Scientific Research (A), HOKKAIDO UNIVERSITY, 06402037
  • Fabrication and Characterization of Semiconductor Quantum Dots by Selective Area Grant
    Grants-in-Aid for Scientific Research
    1992 - 1993
    FUKUI Takashi; AKAZAWA Masamichi; MOTOHISA Jun-ich; HASEGAWA Hideki
    GaAs and AlGaAs micro-Pyramidal Structures having four-fold symetry facets (011) were fabricated using selective area MOVPE on (001) GaAs substrates partlally masked with a SiO_2. In order to study accurate growth rate, wider mask-patterned substrates were used. Low pressure horizontal MOVPE reactor was used. Source materials were TMGa, TEAI, quality of micro-pyramidal structures were characterized by cleaved cross section image of scanning electron microscope (SEM) and photoluminescence (PL) from quantum well. The main results are as follows : The growth rate enhances in selective are growth, compared to a planer GaAs layr. The growth rate enhancement is small under high AsH_3 partical pressure. From these results, growth mechanisms were discussed.
    Japan Society for the Promotion of Science, Grant-in-Aid for General Scientific Research (B), Hokkaido University, 04452165
  • 半導体ナノ構造の形成、評価とデバイス、回路応用
    Competitive research funding
■ Industrial Property Rights
  • 半導体発光素子アレー、その製造方法、及び光送信機器
    Patent right, 比留間 健之; 原 真二郎; 本久 順一; 福井 孝志, 国立大学法人北海道大学, シャープ株式会社
    特願2007-214119, 20 Aug. 2007
    特開2009-049209, 05 Mar. 2009
    特許第5309386号
    12 Jul. 2013
    201303062035694670
  • 多接合型太陽電池の製造方法
    Patent right, 後藤 肇; 本久 順一; 福井 孝志, 本田技研工業株式会社
    特願2008-225684, 03 Sep. 2008
    特開2009-105382, 14 May 2009
    特許第5231142号
    29 Mar. 2013
    200903030639286993
  • 半導体発光素子アレー、およびその製造方法
    Patent right, 比留間 健之; 原 真二郎; 本久 順一; 福井 孝志, 国立大学法人北海道大学, シャープ株式会社
    特願2010-533729, 17 Oct. 2008
    特許第5211352号
    08 Mar. 2013
    201303061533403902
  • ナノワイヤ太陽電池
    Patent right, 遠藤 広考; 後藤 肇; 福井 孝志; 本久 順一, 本田技研工業株式会社, 国立大学法人北海道大学
    特願2011-045624, 02 Mar. 2011
    特開2012-182389, 20 Sep. 2012
    201203045215731574
  • 半導体装置及び半導体装置の製造方法
    Patent right, 福井 孝志; 冨岡 克広; 本久 順一; 原 真二郎, 国立大学法人北海道大学, シャープ株式会社
    JP2011053909, 23 Feb. 2011
    WO2011-105397, 01 Sep. 2011
    201303085910444526
  • ナノワイヤ太陽電池及びその製造方法
    Patent right, 後藤 肇; 福井 孝志; 本久 順一; 比留間 健之, 本田技研工業株式会社, 国立大学法人北海道大学
    特願2009-295806, 25 Dec. 2009
    特開2011-138804, 14 Jul. 2011
    201103045405981545
  • 太陽電池素子、カラーセンサ、ならびに発光素子及び受光素子の製造方法
    Patent right, 比留間 健之; 本久 順一; 福井 孝志; 後藤 肇; 遠藤 広考, 本田技研工業株式会社, 国立大学法人北海道大学
    特願2010-261564, 24 Nov. 2010
    特開2011-135058, 07 Jul. 2011
    201103011621612170
  • 半導体発光素子アレー、およびその製造方法
    Patent right, 比留間 健之; 原 真二郎; 本久 順一; 福井 孝志, 国立大学法人北海道大学, シャープ株式会社
    JP2008002956, 17 Oct. 2008
    WO2010-044129, 22 Apr. 2010
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  • 半導体構造物の製造方法
    Patent right, 冨岡 克広; 福井 孝志; 本久 順一; 原 真二郎, 国立大学法人北海道大学
    特願2008-223713, 01 Sep. 2008
    特開2010-058988, 18 Mar. 2010
    201003099664995126
  • ナノワイヤ太陽電池及びその製造方法
    Patent right, 後藤 肇; 大橋 智昭; 本久 順一; 福井 孝志, 本田技研工業株式会社, 国立大学法人 北海道大学
    特願2009-106213, 24 Apr. 2009
    特開2010-028092, 04 Feb. 2010
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